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Message-ID: <a880d96f-d879-52d0-48ff-cbcdb88a3f29@somainline.org>
Date:   Mon, 4 Jan 2021 16:30:11 +0100
From:   Konrad Dybcio <konrad.dybcio@...ainline.org>
To:     Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        mturquette@...libre.com, sboyd@...nel.org, robh+dt@...nel.org,
        jassisinghbrar@...il.com
Cc:     viresh.kumar@...aro.org, ulf.hansson@...aro.org,
        bjorn.andersson@...aro.org, agross@...nel.org,
        linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 4/5] clk: qcom: Add A7 PLL support

Hi,

could you explicitly state in the probe function (or just in the driver in general, as there's not much more?) and the config structs that the target SoC is X55?

A few more SoCs (MDM9607, MSM8x26 and some others) also use what's known as "A7PLL" downstream, but all of them have a separate configuration for their specific PLLs, which aren't compatible with each other.


Konrad

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