linux-kernel - Re: [PATCH 1/3] MIPS: kernel: Support extracting off-line stack traces from user-space with perf

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <0712b131-715a-a83a-bc9e-61405824ff0e@flygoat.com>
Date:   Tue, 5 Jan 2021 11:45:37 +0800
From:   Jiaxun Yang <jiaxun.yang@...goat.com>
To:     Peter Zijlstra <peterz@...radead.org>,
        Tiezhu Yang <yangtiezhu@...ngson.cn>
Cc:     Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>, linux-mips@...r.kernel.org,
        linux-kernel@...r.kernel.org, Xuefeng Li <lixuefeng@...ngson.cn>,
        David Daney <david.daney@...ium.com>,
        Ralf Baechle <ralf@...ux-mips.org>,
        Archer Yan <ayan@...ecomp.com>, x86@...nel.org
Subject: Re: [PATCH 1/3] MIPS: kernel: Support extracting off-line stack
 traces from user-space with perf

在 2021/1/4 下午6:59, Peter Zijlstra 写道:
> On Tue, Dec 29, 2020 at 08:55:59PM +0800, Tiezhu Yang wrote:
>> +u64 perf_reg_abi(struct task_struct *tsk)
>> +{
>> +	if (test_tsk_thread_flag(tsk, TIF_32BIT_REGS))
>> +		return PERF_SAMPLE_REGS_ABI_32;
>> +	else
>> +		return PERF_SAMPLE_REGS_ABI_64;
>> +}
> So we recently changed this on x86 to not rely on TIF flags. IIRC the
> problem is that on x86 you can change the mode of a task without the
> kernel being aware of it. Is something like that possible on MIPS as
> well?

Hi all,

In MIPS world it's impossible to raise a thread to 64bit without kernel 
aware.
Without STATUS.UX set it will trigger reserved instruction exception 
when trying
to run 64bit instructions.

However it may be possible to run with 32bit ABI without TIF_32BIT_REGS 
if user
program didn't get ELF ABI right. I think that's out of our current 
consideration.

> The thing x86 does today is look at it's pt_regs state to determine the
> actual state.
It is possible to look at pt_regs Status.UX bit on MIPS. But it seems 
unnecessary
as user can't change it.

Thanks.

- Jiaxun