linux-kernel - Re: [PATCH v3 1/5] RISC-V: Add Microchip PolarFire SoC kconfig option

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <4655c810-e406-f807-d2dc-1b2e0198d945@microchip.com>
Date:   Thu, 7 Jan 2021 11:39:41 +0000
From:   <Cyril.Jean@...rochip.com>
To:     <atish.patra@....com>, <linux-kernel@...r.kernel.org>
CC:     <bin.meng@...driver.com>, <anup@...infault.org>,
        <aou@...s.berkeley.edu>, <alistair.francis@....com>,
        <anup.patel@....com>, <devicetree@...r.kernel.org>,
        <linux-riscv@...ts.infradead.org>, <palmer@...belt.com>,
        <paul.walmsley@...ive.com>, <robh+dt@...nel.org>,
        <Ivan.Griffin@...rochip.com>, <Daire.McNamara@...rochip.com>,
        <Conor.Dooley@...rochip.com>
Subject: Re: [PATCH v3 1/5] RISC-V: Add Microchip PolarFire SoC kconfig option

Hi Atish,

On 12/4/20 8:58 AM, Atish Patra wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add Microchip PolarFire kconfig option which selects SoC specific
> and common drivers that is required for this SoC.
>
> Signed-off-by: Atish Patra <atish.patra@....com>
> Reviewed-by: Bin Meng <bin.meng@...driver.com>
> Reviewed-by: Anup Patel <anup@...infault.org>
> ---
>   arch/riscv/Kconfig.socs | 7 +++++++
>   1 file changed, 7 insertions(+)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 8a55f6156661..148ab095966b 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -1,5 +1,12 @@
>   menu "SoC selection"
>
> +config SOC_MICROCHIP_POLARFIRE
> +       bool "Microchip PolarFire SoCs"
> +       select MCHP_CLK_PFSOC
Can you change MCHP_CLK_PFSOC to MCHP_CLK_MPFS to align with the v2 
clock driver?
> +       select SIFIVE_PLIC
> +       help
> +         This enables support for Microchip PolarFire SoC platforms.
> +
>   config SOC_SIFIVE
>          bool "SiFive SoCs"
>          select SERIAL_SIFIVE if TTY
> --
> 2.25.1
>
Regards,

Cyril.