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Date:   Sat, 26 Dec 2020 01:37:54 +0100
From:   Aurelien Jarno <aurelien@...el32.net>
To:     Atish Patra <atish.patra@....com>
Cc:     linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        Bin Meng <bin.meng@...driver.com>, Cyril.Jean@...rochip.com,
        Daire McNamara <daire.mcnamara@...rochip.com>,
        Anup Patel <anup@...infault.org>,
        Anup Patel <anup.patel@....com>, Conor.Dooley@...rochip.com,
        Rob Herring <robh+dt@...nel.org>, Ivan.Griffin@...rochip.com,
        Albert Ou <aou@...s.berkeley.edu>,
        Alistair Francis <alistair.francis@....com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v3 4/5] RISC-V: Enable Microchip PolarFire ICICLE SoC

On 2020-12-04 00:58, Atish Patra wrote:
> Enable Microchip PolarFire ICICLE soc config in defconfig.
> It allows the default upstream kernel to boot on PolarFire ICICLE board.
> 
> Signed-off-by: Atish Patra <atish.patra@....com>
> Reviewed-by: Anup Patel <anup@...infault.org>
> Reviewed-by: Bin Meng <bin.meng@...driver.com>
> ---
>  arch/riscv/configs/defconfig | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index d222d353d86d..2660fa05451e 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -16,6 +16,7 @@ CONFIG_EXPERT=y
>  CONFIG_BPF_SYSCALL=y
>  CONFIG_SOC_SIFIVE=y
>  CONFIG_SOC_VIRT=y
> +CONFIG_SOC_MICROCHIP_POLARFIRE=y
>  CONFIG_SMP=y
>  CONFIG_JUMP_LABEL=y
>  CONFIG_MODULES=y
> @@ -79,6 +80,9 @@ CONFIG_USB_OHCI_HCD=y
>  CONFIG_USB_OHCI_HCD_PLATFORM=y
>  CONFIG_USB_STORAGE=y
>  CONFIG_USB_UAS=y
> +CONFIG_SDHCI=y

I guess this should be CONFIG_MMC_SDHCI=y

> +CONFIG_MMC_SDHCI_PLTFM=y
> +CONFIG_MMC_SDHCI_CADENCE=y
>  CONFIG_MMC=y
>  CONFIG_MMC_SPI=y
>  CONFIG_RTC_CLASS=y

Regards,
Aurelien

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@...el32.net                 http://www.aurel32.net

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