linux-kernel - Re: [PATCH v2 4/5] csky: Fixup asm/cmpxchg.h with correct ordering barrier

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Message-ID: <X/cBV8Bll0K2PwTx@hirez.programming.kicks-ass.net>
Date:   Thu, 7 Jan 2021 13:40:55 +0100
From:   Peter Zijlstra <peterz@...radead.org>
To:     guoren@...nel.org
Cc:     arnd@...db.de, linux-kernel@...r.kernel.org,
        linux-csky@...r.kernel.org, linux-arch@...r.kernel.org,
        Guo Ren <guoren@...ux.alibaba.com>,
        "Paul E . McKenney" <paulmck@...nel.org>
Subject: Re: [PATCH v2 4/5] csky: Fixup asm/cmpxchg.h with correct ordering
 barrier

On Sun, Dec 20, 2020 at 03:39:22PM +0000, guoren@...nel.org wrote:

> +#define cmpxchg(ptr, o, n) 					\
> +({								\
> +	__typeof__(*(ptr)) __ret;				\
> +	__smp_release_fence();					\
> +	__ret = cmpxchg_relaxed(ptr, o, n);			\
> +	__smp_acquire_fence();					\
> +	__ret;							\
> +})

So you failed to Cc me on patch #2 that introduces these barriers. I've
dug it out, but I'm still terribly confused on all that.

On first reading the above looks wrong.

Could you also clarify the difference (if any) between your bar.brwarw
and sync instruction?

Specifically, about transitiviry, or whatever we seem to be calling that
today.