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Message-ID: <92934cb4-0b68-bdcc-d63b-d20628bc3c94@linux.intel.com>
Date:   Mon, 11 Jan 2021 11:52:51 -0600
From:   Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>
To:     Hans de Goede <hdegoede@...hat.com>,
        Lee Jones <lee.jones@...aro.org>,
        MyungJoo Ham <myungjoo.ham@...sung.com>,
        Chanwoo Choi <cw00.choi@...sung.com>,
        Cezary Rojewski <cezary.rojewski@...el.com>,
        Liam Girdwood <liam.r.girdwood@...ux.intel.com>,
        Jie Yang <yang.jie@...ux.intel.com>,
        Mark Brown <broonie@...nel.org>
Cc:     alsa-devel@...a-project.org, linux-kernel@...r.kernel.org,
        patches@...nsource.cirrus.com
Subject: Re: [PATCH 12/14] ASoC: Intel: Add DMI quirk table to
 soc_intel_is_byt_cr()



On 12/27/20 3:12 PM, Hans de Goede wrote:
> Some Bay Trail systems:
> 1. Use a non CR version of the Bay Trail SoC
> 2. Contain at least 6 interrupt resources so that the
>     platform_get_resource(pdev, IORESOURCE_IRQ, 5) check to workaround
>     non CR systems which list their IPC IRQ at index 0 despite being
>     non CR does not work
> 3. Despite 1. and 2. still have their IPC IRQ at index 0 rather then 5
> 
> Add a DMI quirk table to check for the few known models with this issue,
> so that the right IPC IRQ index is used on these systems.
> 
> Signed-off-by: Hans de Goede <hdegoede@...hat.com>

Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>

Thanks Hans!

> ---
>   sound/soc/intel/common/soc-intel-quirks.h | 25 +++++++++++++++++++++++
>   1 file changed, 25 insertions(+)
> 
> diff --git a/sound/soc/intel/common/soc-intel-quirks.h b/sound/soc/intel/common/soc-intel-quirks.h
> index b07df3059926..a93987ab7f4d 100644
> --- a/sound/soc/intel/common/soc-intel-quirks.h
> +++ b/sound/soc/intel/common/soc-intel-quirks.h
> @@ -11,6 +11,7 @@
>   
>   #if IS_ENABLED(CONFIG_X86)
>   
> +#include <linux/dmi.h>
>   #include <asm/cpu_device_id.h>
>   #include <asm/intel-family.h>
>   #include <asm/iosf_mbi.h>
> @@ -38,12 +39,36 @@ SOC_INTEL_IS_CPU(cml, KABYLAKE_L);
>   
>   static inline bool soc_intel_is_byt_cr(struct platform_device *pdev)
>   {
> +	/*
> +	 * List of systems which:
> +	 * 1. Use a non CR version of the Bay Trail SoC
> +	 * 2. Contain at least 6 interrupt resources so that the
> +	 *    platform_get_resource(pdev, IORESOURCE_IRQ, 5) check below
> +	 *    succeeds
> +	 * 3. Despite 1. and 2. still have their IPC IRQ at index 0 rather then 5
> +	 *
> +	 * This needs to be here so that it can be shared between the SST and
> +	 * SOF drivers. We rely on the compiler to optimize this out in files
> +	 * where soc_intel_is_byt_cr is not used.
> +	 */
> +	static const struct dmi_system_id force_bytcr_table[] = {
> +		{	/* Lenovo Yoga Tablet 2 series */
> +			.matches = {
> +				DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
> +				DMI_MATCH(DMI_PRODUCT_FAMILY, "YOGATablet2"),
> +			},
> +		},
> +		{}
> +	};
>   	struct device *dev = &pdev->dev;
>   	int status = 0;
>   
>   	if (!soc_intel_is_byt())
>   		return false;
>   
> +	if (dmi_check_system(force_bytcr_table))
> +		return true;
> +
>   	if (iosf_mbi_available()) {
>   		u32 bios_status;
>   
> 

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