linux-kernel - Re: [PATCH 2/3] perf/x86/rapl: Fix energy counter detection

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Date:   Fri, 15 Jan 2021 21:03:24 +0100
From:   Peter Zijlstra <peterz@...radead.org>
To:     Zhang Rui <rui.zhang@...el.com>
Cc:     mingo@...hat.com, acme@...nel.org, mark.rutland@....com,
        alexander.shishkin@...ux.intel.com, jolsa@...hat.com,
        namhyung@...nel.org, linux-kernel@...r.kernel.org, x86@...nel.org,
        kan.liang@...ux.intel.com, ak@...ux.intel.com
Subject: Re: [PATCH 2/3] perf/x86/rapl: Fix energy counter detection

On Fri, Jan 15, 2021 at 05:22:07PM +0800, Zhang Rui wrote:
> In the RAPL ENERGY_COUNTER MSR, only the lower 32bits represent the
> energy counter, and the higher 32bits are reserved.
> 
> Add the MSR mask for these MSRs to fix a problem that the RAPL PMU events
> are added erroneously when higher 32bits contain non-zero value.

Why would these high bits be non-zero?