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Date: Tue, 19 Jan 2021 17:17:09 -0600
From: Rob Herring <robh@...nel.org>
To: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...ainline.org>
Cc: stanimir.varbanov@...aro.org, agross@...nel.org,
bjorn.andersson@...aro.org, mchehab@...nel.org,
devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-media@...r.kernel.org, linux-kernel@...r.kernel.org,
konrad.dybcio@...ainline.org, marijn.suijten@...ainline.org,
phone-devel@...r.kernel.org
Subject: Re: [PATCH 2/2] media: dt-bindings: media: venus: Add sdm660 DT
schema
On Fri, Jan 15, 2021 at 07:52:52PM +0100, AngeloGioacchino Del Regno wrote:
> Add new qcom,sdm660-venus DT binding schema.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>
> ---
> .../bindings/media/qcom,sdm660-venus.yaml | 164 ++++++++++++++++++
> 1 file changed, 164 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml
>
> base-commit: 012bd807cf654b992cdc4db7eab85c1e95f9d571
> prerequisite-patch-id: 734bdefdb043a8f91a48916246cc9a36fb5966e5
> prerequisite-patch-id: 999517c02973237996492a41ed5bfc2990083932
> prerequisite-patch-id: a48910425fac61948a7a26bec4d40d63e3368569
> prerequisite-patch-id: b1a1a4216eed0d04dd16e6e8e1053dee185d06d8
> prerequisite-patch-id: dff12be2631cc21ef1c3c930fba49d979f5055fe
>
> diff --git a/Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml
> new file mode 100644
> index 000000000000..e7568d4007af
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml
> @@ -0,0 +1,164 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/media/qcom,sdm660-venus.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm Venus video encode and decode accelerators
> +
> +maintainers:
> + - Stanimir Varbanov <stanimir.varbanov@...aro.org>
> +
> +description: |
> + The Venus IP is a video encode and decode accelerator present
> + on Qualcomm platforms
> +
> +properties:
> + compatible:
> + const: qcom,sdm660-venus
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 5
> +
> + clock-names:
> + items:
> + - const: core
> + - const: iface
> + - const: bus
> + - const: bus_throttle
> + - const: vcodec0_core
> +
> + interconnects:
> + maxItems: 2
> +
> + interconnect-names:
> + items:
> + - const: video-mem
> + - const: cpu-cfg
> +
> + iommus:
> + maxItems: 20
Perhaps some explanation as to what all these are. Looks like it is just
1 iommu, but lots of ids?
> +
> + memory-region:
> + maxItems: 1
> +
> + power-domains:
> + minItems: 3
> +
> + power-domain-names:
> + items:
> + - const: cx
> + - const: vcodec0
> + - const: venus
> +
> + video-decoder:
> + type: object
> +
> + properties:
> + compatible:
> + const: venus-decoder
> +
> + required:
> + - compatible
> +
> + additionalProperties: false
> +
> + video-encoder:
> + type: object
> +
> + properties:
> + compatible:
> + const: venus-encoder
> +
> + required:
> + - compatible
> +
> + additionalProperties: false
> +
> + video-firmware:
> + type: object
> +
> + description: |
> + Firmware subnode is needed when the platform does not
> + have TrustZone.
> +
> + properties:
> + iommus:
> + maxItems: 2
> +
> + required:
> + - iommus
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - power-domains
> + - power-domain-names
> + - clocks
> + - clock-names
> + - iommus
> + - memory-region
> + - video-decoder
> + - video-encoder
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
> + #include <dt-bindings/power/qcom-rpmpd.h>
> +
> + video-codec@...0000 {
> + compatible = "qcom,sdm660-venus";
> + reg = <0x0cc00000 0xff000>;
> + interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&rpmpd SDM660_VDDCX>,
> + <&mmcc VENUS_CORE0_GDSC>,
> + <&mmcc VENUS_GDSC>;
> + power-domain-names = "cx", "vcodec0", "venus";
> + clocks = <&mmcc VIDEO_CORE_CLK>,
> + <&mmcc VIDEO_AHB_CLK>,
> + <&mmcc VIDEO_AXI_CLK>,
> + <&mmcc THROTTLE_VIDEO_AXI_CLK>,
> + <&mmcc VIDEO_SUBCORE0_CLK>;
> + clock-names = "core", "iface", "bus", "bus_throttle",
> + "vcodec0_core";
> + iommus = <&mmss_smmu 0x400>,
> + <&mmss_smmu 0x401>,
> + <&mmss_smmu 0x40a>,
> + <&mmss_smmu 0x407>,
> + <&mmss_smmu 0x40e>,
> + <&mmss_smmu 0x40f>,
> + <&mmss_smmu 0x408>,
> + <&mmss_smmu 0x409>,
> + <&mmss_smmu 0x40b>,
> + <&mmss_smmu 0x40c>,
> + <&mmss_smmu 0x40d>,
> + <&mmss_smmu 0x410>,
> + <&mmss_smmu 0x421>,
> + <&mmss_smmu 0x428>,
> + <&mmss_smmu 0x429>,
> + <&mmss_smmu 0x42b>,
> + <&mmss_smmu 0x42c>,
> + <&mmss_smmu 0x42d>,
> + <&mmss_smmu 0x411>,
> + <&mmss_smmu 0x431>;
> + memory-region = <&venus_region>;
> +
> + video-decoder {
> + compatible = "venus-decoder";
> + };
> +
> + video-encoder {
> + compatible = "venus-encoder";
> + };
> + };
> --
> 2.29.2
>
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