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Date:   Tue, 19 Jan 2021 03:29:19 +0000
From:   Ryan Chen <ryan_chen@...eedtech.com>
To:     Joel Stanley <joel@....id.au>
CC:     Joel Stanley <joel@...ux.ibm.com>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "andrewrj@....ibm.com" <andrewrj@....ibm.com>,
        BMC-SW <BMC-SW@...eedtech.com>, Andrew Jeffery <andrew@...id.au>
Subject: RE: [PATCH 1/1] clk: aspeed: Fix APLL calculate formula for
 ast2600-A2

> -----Original Message-----
> From: Joel Stanley <joel@....id.au>
> Sent: Tuesday, January 19, 2021 11:10 AM
> To: Ryan Chen <ryan_chen@...eedtech.com>
> Cc: Joel Stanley <joel@...ux.ibm.com>; Michael Turquette
> <mturquette@...libre.com>; Stephen Boyd <sboyd@...nel.org>;
> linux-clk@...r.kernel.org; linux-kernel@...r.kernel.org;
> andrewrj@....ibm.com; BMC-SW <BMC-SW@...eedtech.com>; Andrew
> Jeffery <andrew@...id.au>
> Subject: Re: [PATCH 1/1] clk: aspeed: Fix APLL calculate formula for ast2600-A2
> 
> On Tue, 19 Jan 2021 at 03:04, Ryan Chen <ryan_chen@...eedtech.com>
> wrote:
> >
> > > -----Original Message-----
> > > From: Joel Stanley <joel@...ux.ibm.com>
> > > Sent: Tuesday, January 19, 2021 10:20 AM
> > > To: Ryan Chen <ryan_chen@...eedtech.com>; Michael Turquette
> > > <mturquette@...libre.com>; Stephen Boyd <sboyd@...nel.org>;
> > > linux-clk@...r.kernel.org; linux-kernel@...r.kernel.org;
> > > andrewrj@....ibm.com; BMC-SW <BMC-SW@...eedtech.com>
> > > Cc: joel@....id.au; Andrew Jeffery <andrew@...id.au>
> > > Subject: Re: [PATCH 1/1] clk: aspeed: Fix APLL calculate formula for
> > > ast2600-A2
> > >
> > > On Mon, 2021-01-18 at 18:08 +0800, Ryan Chen wrote:
> > > > AST2600A1/A2 have different pll calculate formula.
> > >
> > > To clarify, only the A0 has the old calculation, and all subsequent
> > > revisions use the new calculation?
> > >
> > > If this is the case, do we need to support A0 in mainline linux, or
> > > should we drop support for A0 and only support A1, A2 and onwards?
> > >
> > A0/A1 is use older calculate formula
> > After A2 is new calculate formula as the patch.
> 
> Thanks for clarifying. I suggest you change the commit log to say something
> like this:
> 
> Starting from A2, the A-PLL calculation has changed. Use the existing formula
> for A0/A1 and the new formula for A2 onwards.
> 
> >
> > > You should add a line to indicate this is a fix:
> > >
> > > Fixes: d3d04f6c330a ("clk: Add support for AST2600 SoC")
> > >
> > Got it. so should I send new patch?
> 
> Yes, please consider adjusting the commit message as I suggested above, and
> add the fixes line.
> 
> > > > +       u32 chip_id = readl(scu_g6_base + ASPEED_G6_SILICON_REV);
> > > >
> > > > -       if (val & BIT(20)) {
> > > > -               /* Pass through mode */
> > > > -               mult = div = 1;
> > > > +       if (((chip_id & CHIP_REVISION_ID) >> 16) >= 2) {
> 
> Will this test be true if there are future versions of the chip (A3, etc)?
Yes, is also support for A3. 

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