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Date:   Wed, 20 Jan 2021 07:42:47 -0800
From:   Tom Rix <trix@...hat.com>
To:     Xu Yilun <yilun.xu@...el.com>, lee.jones@...aro.org,
        linux-kernel@...r.kernel.org
Cc:     matthew.gerlach@...ux.intel.com, russell.h.weight@...el.com,
        lgoncalv@...hat.com, hao.wu@...el.com
Subject: Re: [PATCH 1/2] mfd: intel-m10-bmc: fix the register access range

A side note..

I think it would be good if the intel-m10-bmc.* files were tracked in the MAINTAINERS files.

I was surprised the Lee was the only reviewer.  Maybe Yilun or Matt should also be added.

On 1/19/21 6:34 PM, Xu Yilun wrote:
> This patch fixes the max register address of MAX 10 BMC. The range
> 0x20000000 ~ 0x200000fc are for control registers of the QSPI flash
> controller, which are not accessible to host.
>
> Signed-off-by: Xu Yilun <yilun.xu@...el.com>
> ---
>  include/linux/mfd/intel-m10-bmc.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
> index c8ef2f1..06da62c 100644
> --- a/include/linux/mfd/intel-m10-bmc.h
> +++ b/include/linux/mfd/intel-m10-bmc.h
> @@ -11,7 +11,7 @@
>  
>  #define M10BMC_LEGACY_SYS_BASE		0x300400
>  #define M10BMC_SYS_BASE			0x300800
> -#define M10BMC_MEM_END			0x200000fc
> +#define M10BMC_MEM_END			0x1fffffff
Reviewed-by: Tom Rix <trix@...hat.com>
>  
>  /* Register offset of system registers */
>  #define NIOS2_FW_VERSION		0x0

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