[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20210120200156.2782528-1-f.fainelli@gmail.com>
Date: Wed, 20 Jan 2021 12:01:53 -0800
From: Florian Fainelli <f.fainelli@...il.com>
To: linux-arm-kernel@...ts.infradead.org
Cc: Florian Fainelli <f.fainelli@...il.com>,
Russell King <linux@...linux.org.uk>,
bcm-kernel-feedback-list@...adcom.com (maintainer:BROADCOM BCM7XXX ARM
ARCHITECTURE), Linus Walleij <linus.walleij@...aro.org>,
linux-kernel@...r.kernel.org (open list)
Subject: [PATCH] ARM: brcmstb: Add debug UART entry for 72116
72116 has the same memory map as 7255 and the same physical address for
the UART, alias the definition accordingly.
Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
---
arch/arm/include/debug/brcmstb.S | 30 ++++++++++++++++--------------
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S
index 0ff32ffc610c..f684e3a815f6 100644
--- a/arch/arm/include/debug/brcmstb.S
+++ b/arch/arm/include/debug/brcmstb.S
@@ -25,6 +25,7 @@
#define SUN_TOP_CTRL_BASE_V7 REG_PHYS_ADDR_V7(0x404000)
#define UARTA_3390 REG_PHYS_ADDR(0x40a900)
+#define UARTA_72116 UARTA_7255
#define UARTA_7250 REG_PHYS_ADDR(0x40b400)
#define UARTA_7255 REG_PHYS_ADDR(0x40c000)
#define UARTA_7260 UARTA_7255
@@ -85,20 +86,21 @@ ARM_BE8( rev \rv, \rv )
/* Chip specific detection starts here */
20: checkuart(\rp, \rv, 0x33900000, 3390)
-21: checkuart(\rp, \rv, 0x72160000, 7216)
-22: checkuart(\rp, \rv, 0x07216400, 72164)
-23: checkuart(\rp, \rv, 0x07216500, 72165)
-24: checkuart(\rp, \rv, 0x72500000, 7250)
-25: checkuart(\rp, \rv, 0x72550000, 7255)
-26: checkuart(\rp, \rv, 0x72600000, 7260)
-27: checkuart(\rp, \rv, 0x72680000, 7268)
-28: checkuart(\rp, \rv, 0x72710000, 7271)
-29: checkuart(\rp, \rv, 0x72780000, 7278)
-30: checkuart(\rp, \rv, 0x73640000, 7364)
-31: checkuart(\rp, \rv, 0x73660000, 7366)
-32: checkuart(\rp, \rv, 0x07437100, 74371)
-33: checkuart(\rp, \rv, 0x74390000, 7439)
-34: checkuart(\rp, \rv, 0x74450000, 7445)
+21: checkuart(\rp, \rv, 0x07211600, 72116)
+22: checkuart(\rp, \rv, 0x72160000, 7216)
+23: checkuart(\rp, \rv, 0x07216400, 72164)
+24: checkuart(\rp, \rv, 0x07216500, 72165)
+25: checkuart(\rp, \rv, 0x72500000, 7250)
+26: checkuart(\rp, \rv, 0x72550000, 7255)
+27: checkuart(\rp, \rv, 0x72600000, 7260)
+28: checkuart(\rp, \rv, 0x72680000, 7268)
+29: checkuart(\rp, \rv, 0x72710000, 7271)
+30: checkuart(\rp, \rv, 0x72780000, 7278)
+31: checkuart(\rp, \rv, 0x73640000, 7364)
+32: checkuart(\rp, \rv, 0x73660000, 7366)
+33: checkuart(\rp, \rv, 0x07437100, 74371)
+34: checkuart(\rp, \rv, 0x74390000, 7439)
+35: checkuart(\rp, \rv, 0x74450000, 7445)
/* No valid UART found */
90: mov \rp, #0
--
2.25.1
Powered by blists - more mailing lists