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Date:   Wed, 20 Jan 2021 08:35:29 -0600
From:   Yazen Ghannam <yazen.ghannam@....com>
To:     WGH <wgh@...lan.ru>
Cc:     linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
        bp@...en8.de, Smita.KoralahalliChannabasappa@....com
Subject: Re: [PATCH] EDAC/AMD64: Update scrub register addresses for newer
 models

On Mon, Jan 18, 2021 at 04:30:58AM +0300, WGH wrote:
> On 16/01/2021 17:33, Yazen Ghannam wrote:
> > From: Yazen Ghannam <yazen.ghannam@....com>
> >
> > The Family 17h scrubber registers moved to different offset starting
> > with Model 30h. The new register offsets are used for all currently
> > available models since then.
> >
> > Use the new register addresses as the defaults.
> >
> > Set the proper scrub register addresses during module init for older
> > models.
> 
> So I tested the patch on my machine (AMD Ryzen 9 3900XT on ASRock B550 Extreme4 motherboard, Linux 5.10.7).
> 
> The /sys/devices/system/edac/mc/mc0/sdram_scrub_rate value seems to be stuck at 12284069 right after the boot, and does not change.
> Writes to the file do not report any errors.
> 
> dmesg:
> 
> [    0.549451] EDAC MC: Ver: 3.0.0
> [    0.817576] EDAC amd64: F17h_M70h detected (node 0).
> [    0.818159] EDAC amd64: Node 0: DRAM ECC enabled.
> [    0.818717] EDAC amd64: MCT channel count: 2
> [    0.819324] EDAC MC0: Giving out device to module amd64_edac controller F17h_M70h: DEV 0000:00:18.3 (INTERRUPT)
> [    0.819909] EDAC MC: UMC0 chip selects:
> [    0.819910] EDAC amd64: MC: 0: 16384MB 1: 16384MB
> [    0.820488] EDAC amd64: MC: 2: 16384MB 3: 16384MB
> [    0.821067] EDAC MC: UMC1 chip selects:
> [    0.821067] EDAC amd64: MC: 0: 16384MB 1: 16384MB
> [    0.821630] EDAC amd64: MC: 2: 16384MB 3: 16384MB
> [    0.822187] EDAC amd64: using x16 syndromes.
> [    0.822739] EDAC PCI0: Giving out device to module amd64_edac controller EDAC PCI controller: DEV 0000:00:18.0 (POLLED)
> [    0.823314] AMD64 EDAC driver v3.5.0
> 
>

Thanks for testing. I'll try to find a similar system and check it out.

Thanks,
Yazen

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