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Message-ID: <20210120144111.GB1385775@yaz-nikka.amd.com>
Date: Wed, 20 Jan 2021 08:41:11 -0600
From: Yazen Ghannam <yazen.ghannam@....com>
To: Borislav Petkov <bp@...en8.de>
Cc: linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
Smita.KoralahalliChannabasappa@....com, wgh@...lan.ru
Subject: Re: [PATCH] EDAC/AMD64: Update scrub register addresses for newer
models
On Mon, Jan 18, 2021 at 08:31:12PM +0100, Borislav Petkov wrote:
> On Sat, Jan 16, 2021 at 02:33:53PM +0000, Yazen Ghannam wrote:
> > +static struct {
> > + u32 base, limit;
> > +} f17h_scrub_regs = {F17H_M30H_SCR_BASE_ADDR, F17H_M30H_SCR_LIMIT_ADDR};
>
> Why not make this part of struct amd64_umc so that you can access them
> through pvt->umc?
>
We have a struct amd64_umc per channel, so putting these fixed values
there seemed redundant. Would you mind if we put this in struct
amd64_family_type? We can then set the values per family/model group
like we do with the max_mcs.
Thanks,
Yazen
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