linux-kernel - Re: [PATCH v3 02/21] mmc: sunxi: add support for A100 mmc controller

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Message-ID: <20210121163830.5fhrr3qx4kjbqj5y@gilmour>
Date:   Thu, 21 Jan 2021 17:38:30 +0100
From:   Maxime Ripard <maxime@...no.tech>
To:     Andre Przywara <andre.przywara@....com>
Cc:     Chen-Yu Tsai <wens@...e.org>,
        Jernej Skrabec <jernej.skrabec@...l.net>,
        Icenowy Zheng <icenowy@...c.io>,
        Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh@...nel.org>,
        Clément Péron <peron.clem@...il.com>,
        Samuel Holland <samuel@...lland.org>,
        Shuosheng Huang <huangshuosheng@...winnertech.com>,
        Yangtao Li <tiny.windzz@...il.com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-sunxi@...glegroups.com, Ulf Hansson <ulf.hansson@...aro.org>
Subject: Re: [PATCH v3 02/21] mmc: sunxi: add support for A100 mmc controller

Hi Andre,

On Mon, Jan 18, 2021 at 03:52:28PM +0000, Andre Przywara wrote:
> On Mon, 18 Jan 2021 14:28:54 +0100
> Maxime Ripard <maxime@...no.tech> wrote:
> 
> Hi Maxime,
> 
> > On Mon, Jan 18, 2021 at 02:08:29AM +0000, Andre Przywara wrote:
> > > From: Yangtao Li <frank@...winnertech.com>
> > > 
> > > This patch adds support for A100 MMC controller, which use word
> > > address for internal dma.
> > > 
> > > Signed-off-by: Yangtao Li <frank@...winnertech.com>
> > > Signed-off-by: Andre Przywara <andre.przywara@....com>  
> > 
> > We should also disable the timings setup in probe to derive them from
> > the DT. This is causing issues on some SoCs already, so it would be
> > best to not make the situation worse
> 
> But only for those new SoCs, where we have the speed modes in the DT
> in every case (so only new ones)? And this disabling would be
> SoC/compatible string dependent? Happy to send a patch later if that is
> what you were thinking about.

Yeah, we should only do it for new SoCs at the moment, based on the
compatible.

I guess at some point we'll have to remove it for the older SoCs as well
since we have reports of it failing for SoCs as old as the A20, but
we'll probably want to make it as smooth as possible.

Maxime

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