linux-kernel - Re: [PATCH v5 5/6] arm64: mte: Expose execution mode

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Date:   Thu, 21 Jan 2021 18:41:07 +0100
From:   Andrey Konovalov <andreyknvl@...gle.com>
To:     Vincenzo Frascino <vincenzo.frascino@....com>
Cc:     Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        LKML <linux-kernel@...r.kernel.org>,
        kasan-dev <kasan-dev@...glegroups.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>,
        Dmitry Vyukov <dvyukov@...gle.com>,
        Andrey Ryabinin <aryabinin@...tuozzo.com>,
        Alexander Potapenko <glider@...gle.com>,
        Marco Elver <elver@...gle.com>,
        Evgenii Stepanov <eugenis@...gle.com>,
        Branislav Rankov <Branislav.Rankov@....com>
Subject: Re: [PATCH v5 5/6] arm64: mte: Expose execution mode

On Thu, Jan 21, 2021 at 5:40 PM Vincenzo Frascino
<vincenzo.frascino@....com> wrote:
>
> MTE enabled arm64 HW can be configured in synchronous or asynchronous
> tagging mode of execution.
> In synchronous mode, an exception is triggered if a tag check fault
> occurs.
> In asynchronous mode, if a tag check fault occurs, the TFSR_EL1 register
> is updated asynchronously. The kernel checks the corresponding bits
> periodically.
>
> Introduce an API that exposes the mode of execution to the kernel.
>
> Note: This API will be used by KASAN KUNIT tests to forbid the execution
> when async mode is enable.
>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Will Deacon <will@...nel.org>
> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@....com>
> ---
>  arch/arm64/include/asm/memory.h    | 1 +
>  arch/arm64/include/asm/mte-kasan.h | 6 ++++++
>  arch/arm64/kernel/mte.c            | 8 ++++++++
>  3 files changed, 15 insertions(+)
>
> diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
> index df96b9c10b81..1d4eef519fa6 100644
> --- a/arch/arm64/include/asm/memory.h
> +++ b/arch/arm64/include/asm/memory.h
> @@ -233,6 +233,7 @@ static inline const void *__tag_set(const void *addr, u8 tag)
>  #ifdef CONFIG_KASAN_HW_TAGS
>  #define arch_enable_tagging_sync()             mte_enable_kernel_sync()
>  #define arch_enable_tagging_async()            mte_enable_kernel_async()
> +#define arch_is_mode_sync()                    mte_is_mode_sync()
>  #define arch_set_tagging_report_once(state)    mte_set_report_once(state)
>  #define arch_init_tags(max_tag)                        mte_init_tags(max_tag)
>  #define arch_get_random_tag()                  mte_get_random_tag()
> diff --git a/arch/arm64/include/asm/mte-kasan.h b/arch/arm64/include/asm/mte-kasan.h
> index 76b6a5988ce5..c216160e805c 100644
> --- a/arch/arm64/include/asm/mte-kasan.h
> +++ b/arch/arm64/include/asm/mte-kasan.h
> @@ -31,6 +31,7 @@ void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag);
>
>  void mte_enable_kernel_sync(void);
>  void mte_enable_kernel_async(void);
> +bool mte_is_mode_sync(void);
>  void mte_init_tags(u64 max_tag);
>
>  void mte_set_report_once(bool state);
> @@ -64,6 +65,11 @@ static inline void mte_enable_kernel_sync(void)
>  {
>  }
>
> +static inline bool mte_is_mode_sync(void)
> +{
> +       return false;
> +}
> +
>  static inline void mte_init_tags(u64 max_tag)
>  {
>  }
> diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c
> index 7763ac1f2917..1cc3fc173b97 100644
> --- a/arch/arm64/kernel/mte.c
> +++ b/arch/arm64/kernel/mte.c
> @@ -26,6 +26,7 @@
>  u64 gcr_kernel_excl __ro_after_init;
>
>  static bool report_fault_once = true;
> +static bool __mte_mode_sync = true;
>
>  static void mte_sync_page_tags(struct page *page, pte_t *ptep, bool check_swap)
>  {
> @@ -169,9 +170,16 @@ void mte_enable_kernel_sync(void)
>
>  void mte_enable_kernel_async(void)
>  {
> +       __mte_mode_sync = false;
> +
>         __mte_enable_kernel("asynchronous", SCTLR_ELx_TCF_ASYNC);
>  }
>
> +bool mte_is_mode_sync(void)
> +{
> +       return __mte_mode_sync;
> +}
> +
>  void mte_set_report_once(bool state)
>  {
>         WRITE_ONCE(report_fault_once, state);
> --
> 2.30.0
>

(See my comment on patch #6.)