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Message-ID: <20210128231110.64266932@xps13>
Date: Thu, 28 Jan 2021 23:11:10 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: mdalam@...eaurora.org
Cc: manivannan.sadhasivam@...aro.org, richard@....at, vigneshr@...com,
boris.brezillon@...labora.com, linux-mtd@...ts.infradead.org,
linux-kernel@...r.kernel.org, sricharan@...eaurora.org
Subject: Re: [PATCH V3] mtd: rawnand: qcom: update last code word register
Hello,
mdalam@...eaurora.org wrote on Fri, 29 Jan 2021 03:18:46 +0530:
> On 2021-01-14 21:23, Miquel Raynal wrote:
> > Hello,
> >
> > Md Sadre Alam <mdalam@...eaurora.org> wrote on Sun, 10 Jan 2021
> > 09:31:45 +0530:
> >
> >> From QPIC version 2.0 onwards new register got added to
> >
> > a
> >
> >> read last codeword. This change will update the same.
> >
> > the? ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> > Please reword this sentence.
>
> Fixed this in V4 patch.
> >
> >> For first three code word READ_LOCATION_n register will be
> >> use.For last code word READ_LOCATION_LAST_CW_n register will be
> >> use.
> >
> > "For the first three codewords, READ_LOCATION_n registers will be used.
> > The last codeword register will be accessed through
> > READ_LOCATION_LAST_CW_n."
> >
> > Also, please specify what these registers store.
>
> The location register is mainly use for reading controller
> buffer via BAM mode. The bits of the register "NAND_READ_LOCATION_LAST_CW_n, n=0..4"
> as follow:
Perhaps what I do not understand is: when is this "last_cw" register
more useful than the previous set?
> [9:0]-bits : (OFFSET) This bit defines the offset from the buffer base address to be picked up for DMA.
> [25:16]-bits: (SIZE) This bit of every register will define the size of the chunk for DMA.
> 31-bit : (LAST) If this bit is set, the controller takes the particular register to specify the last chunk
> of data made available for DMA. This chunk is part of the internal buffer of the controller.
>
> >
Thanks,
Miquèl
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