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Message-ID: <465836bd-9c80-fed9-d9af-89275ff810eb@intel.com>
Date: Mon, 1 Feb 2021 14:43:33 -0800
From: "Yu, Yu-cheng" <yu-cheng.yu@...el.com>
To: Dave Hansen <dave.hansen@...el.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, linux-mm@...ck.org,
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Arnd Bergmann <arnd@...db.de>,
Andy Lutomirski <luto@...nel.org>,
Balbir Singh <bsingharora@...il.com>,
Borislav Petkov <bp@...en8.de>,
Cyrill Gorcunov <gorcunov@...il.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Eugene Syromiatnikov <esyr@...hat.com>,
Florian Weimer <fweimer@...hat.com>,
"H.J. Lu" <hjl.tools@...il.com>, Jann Horn <jannh@...gle.com>,
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Randy Dunlap <rdunlap@...radead.org>,
"Ravi V. Shankar" <ravi.v.shankar@...el.com>,
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Dave Martin <Dave.Martin@....com>,
Weijiang Yang <weijiang.yang@...el.com>,
Pengfei Xu <pengfei.xu@...el.com>,
Andrew Cooper <andrew.cooper3@...rix.com>
Subject: Re: [PATCH v18 05/25] x86/fpu/xstate: Introduce CET MSR and XSAVES
supervisor states
On 1/29/2021 2:53 PM, Dave Hansen wrote:
> On 1/29/21 2:35 PM, Yu, Yu-cheng wrote:
>>> Andy Cooper just mentioned on IRC about this nugget in the spec:
>>>
>>> XRSTORS on CET state will do reserved bit and canonicality
>>> checks on the state in similar manner as done by the WRMSR to
>>> these state elements.
>>>
>>> We're using copy_kernel_to_xregs_err(), so the #GP *should* be OK.
>>> Could we prove this out in practice, please?
>>>>
>> Do we want to verify that setting reserved bits in CET XSAVES states
>> triggers GP? Then, yes, I just verified it again. Thanks for
>> reminding. Do we have any particular case relating to this?
>
> I want to confirm that it triggers #GP and kills userspace without the
> kernel WARN'ing or otherwise being visibly unhappy.
For sigreturn, shadow stack pointer is checked against its restore token
and must be smaller than TASK_SIZE_MAX. Sigreturn cannot set any
MSR_IA32_U_CET reserved bits.
>
> What about the return-to-userspace path after a ptracer writes content
> to the CET fields? I don't see the same tolerance for errors in
> __fpregs_load_activate(), for instance.
>
Good thought. I have not sent out my revised PTRACE patch, but values
from user will be checked for valid address and reserved bits.
--
Yu-cheng
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