linux-kernel - Re: [PATCH v6 05/21] arm64: Initialise as nVHE before switching to VHE

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1dbffcd4-5b20-404c-94af-c985a96785e2@marcan.st>
Date:   Fri, 5 Feb 2021 21:01:46 +0900
From:   Hector Martin 'marcan' <marcan@...can.st>
To:     Marc Zyngier <maz@...nel.org>,
        linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.cs.columbia.edu,
        linux-kernel@...r.kernel.org
Cc:     Mark Rutland <mark.rutland@....com>,
        Jing Zhang <jingzhangos@...gle.com>,
        Prasad Sodagudi <psodagud@...eaurora.org>,
        Srinivas Ramana <sramana@...eaurora.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Alexandru Elisei <alexandru.elisei@....com>,
        James Morse <james.morse@....com>,
        Ajay Patil <pajay@....qualcomm.com>, kernel-team@...roid.com,
        David Brazdil <dbrazdil@...gle.com>,
        Will Deacon <will@...nel.org>,
        Ard Biesheuvel <ardb@...nel.org>,
        Julien Thierry <julien.thierry.kdev@...il.com>
Subject: Re: [PATCH v6 05/21] arm64: Initialise as nVHE before switching to
 VHE

On 01/02/2021 20.56, Marc Zyngier wrote:
> As we are aiming to be able to control whether we enable VHE or
> not, let's always drop down to EL1 first, and only then upgrade
> to VHE if at all possible.
> 
> This means that if the kernel is booted at EL2, we always start
> with a nVHE init, drop to EL1 to initialise the the kernel, and
> only then upgrade the kernel EL to EL2 if possible (the process
> is obviously shortened for secondary CPUs).

Unfortunately, this is going to break on Apple SoCs, where it turns out 
HCR_EL2.E2H is hard-wired to 1 - there is no nVHE mode. :(

 >>> mrs(HCR_EL2) & (1<<34)
0x400000000
 >>> msr(HCR_EL2, mrs(HCR_EL2) & ~(1<<34))
 >>> mrs(HCR_EL2) & (1<<34)
0x400000000

-- 
Hector Martin "marcan" (marcan@...can.st)
Public Key: https://mrcn.st/pub