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Message-ID: <7c5bf697-86a6-5147-061c-7a7c38b6897c@ozlabs.ru>
Date:   Tue, 9 Feb 2021 12:51:59 +1100
From:   Alexey Kardashevskiy <aik@...abs.ru>
To:     Jason Gunthorpe <jgg@...dia.com>
Cc:     Max Gurtovoy <mgurtovoy@...dia.com>,
        Cornelia Huck <cohuck@...hat.com>,
        Alex Williamson <alex.williamson@...hat.com>,
        Matthew Rosato <mjrosato@...ux.ibm.com>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, liranl@...dia.com, oren@...dia.com,
        tzahio@...dia.com, leonro@...dia.com, yarong@...dia.com,
        aviadye@...dia.com, shahafs@...dia.com, artemp@...dia.com,
        kwankhede@...dia.com, ACurrid@...dia.com, gmataev@...dia.com,
        cjia@...dia.com, yishaih@...dia.com
Subject: Re: [PATCH 8/9] vfio/pci: use x86 naming instead of igd



On 09/02/2021 05:13, Jason Gunthorpe wrote:
> On Fri, Feb 05, 2021 at 11:42:11AM +1100, Alexey Kardashevskiy wrote:
>>> A real nvswitch function?
>>
>> What do you mean by this exactly? The cpu side of nvlink is "emulated pci
>> devices", the gpu side is not in pci space at all, the nvidia driver manages
>> it via the gpu's mmio or/and cfg space.
> 
> Some versions of the nvswitch chip have a PCI-E link too, that is what
> I though this was all about when I first saw it.

> So, it is really a special set of functions for NVIDIA GPU device
> assignment only applicable to P9 systems, much like IGD is for Intel
> on x86.



These GPUs are not P9 specific and they all have both PCIe and NVLink2 
links. The special part is that some nvlinks are between P9 and GPU and 
the rest are between GPUs, everywhere else (x86, may be ARM) the nvlinks 
are used between GPUs but even there I do not think the nvlink logic is 
presented to the host in the PCI space.



-- 
Alexey

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