linux-kernel - Re: [PATCH V4 0/6] x86: Don't abuse tss.sp1

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Message-ID: <20210210234228.GB75203@linux.intel.com>
Date:   Wed, 10 Feb 2021 15:42:28 -0800
From:   mark gross <mgross@...ux.intel.com>
To:     Lai Jiangshan <jiangshanlai@...il.com>
Cc:     linux-kernel@...r.kernel.org, Borislav Petkov <bp@...en8.de>,
        Lai Jiangshan <laijs@...ux.alibaba.com>,
        Andy Lutomirski <luto@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, x86@...nel.org,
        "H. Peter Anvin" <hpa@...or.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Al Viro <viro@...iv.linux.org.uk>,
        Vincenzo Frascino <vincenzo.frascino@....com>,
        Joerg Roedel <jroedel@...e.de>,
        Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>,
        Reinette Chatre <reinette.chatre@...el.com>,
        Balbir Singh <sblbir@...zon.com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Gabriel Krisman Bertazi <krisman@...labora.com>,
        Kees Cook <keescook@...omium.org>,
        Frederic Weisbecker <frederic@...nel.org>,
        Jens Axboe <axboe@...nel.dk>,
        Arvind Sankar <nivedita@...m.mit.edu>,
        Brian Gerst <brgerst@...il.com>,
        Ard Biesheuvel <ardb@...nel.org>,
        Andi Kleen <ak@...ux.intel.com>,
        Mike Rapoport <rppt@...nel.org>, Mike Hommey <mh@...ndium.org>,
        Mark Gross <mgross@...ux.intel.com>,
        Fenghua Yu <fenghua.yu@...el.com>,
        Tony Luck <tony.luck@...el.com>,
        Anthony Steinhauser <asteinhauser@...gle.com>,
        Jay Lang <jaytlang@....edu>,
        "Chang S. Bae" <chang.seok.bae@...el.com>
Subject: Re: [PATCH V4 0/6] x86: Don't abuse tss.sp1

On Wed, Feb 10, 2021 at 09:39:11PM +0800, Lai Jiangshan wrote:
> From: Lai Jiangshan <laijs@...ux.alibaba.com>
> 
> In x86_64, tss.sp1 is reused as cpu_current_top_of_stack.  We'd better
> directly use percpu since CR3 and gs_base is correct when it is used.
Be more direct if not using percpu is incorrect in some way.
> 
> In x86_32, tss.sp1 is resued as thread.sp0 in three places in entry
s/resued/reused
> code.  We have the correct CR3 and %fs at two of the places.  The last
> one is sysenter.  This patchset makes %fs available earlier so that
> we can also use percpu in sysenter.  And add a percpu cpu_current_thread_sp0
> for thread.sp0 instead of tss.sp1
> 
> [V3]: https://lore.kernel.org/lkml/20210127163231.12709-1-jiangshanlai@gmail.com/
> [V2]: https://lore.kernel.org/lkml/20210125173444.22696-1-jiangshanlai@gmail.com/
> [V1]: https://lore.kernel.org/lkml/20210123084900.3118-1-jiangshanlai@gmail.com/
> 
> Changed from V3:
> 	Update subjects as Borislav's imperative request. ^_^
> 	Update changelog as Borislav suggested.
> 	Change EXPORT_PER_CPU_SYMBOL to EXPORT_PER_CPU_SYMBOL_GPL.
> 
> Changed from V2:
> 	Add missing "%ss:" reported by Brian Gerst.
> 
> Changed from V1:
> 	Requested from Andy to also fix sp1 for x86_32.
> 	Update comments in the x86_64 patch as Andy sugguested.
> 
> Lai Jiangshan (6):
>   x86/entry/64: Move cpu_current_top_of_stack out of TSS
>   x86/entry/32: Use percpu instead of offset-calculation to get
>     thread.sp0 in SWITCH_TO_KERNEL_STACK
>   x86/entry/32: Switch to the task stack without emptying the entry
>     stack
>   x86/entry/32: Restore %fs before switching stack
>   x86/entry/32: Use percpu to get thread.sp0 in SYSENTER
>   x86/entry/32: Introduce cpu_current_thread_sp0 to replace
>     cpu_tss_rw.x86_tss.sp1
> 
>  arch/x86/entry/entry_32.S          | 38 +++++++++++++++++-------------
>  arch/x86/include/asm/processor.h   | 12 ++--------
>  arch/x86/include/asm/switch_to.h   |  8 +------
>  arch/x86/include/asm/thread_info.h |  6 -----
>  arch/x86/kernel/asm-offsets.c      |  1 -
>  arch/x86/kernel/asm-offsets_32.c   | 10 --------
>  arch/x86/kernel/cpu/common.c       | 12 +++++++++-
>  arch/x86/kernel/process.c          |  7 ------
>  arch/x86/mm/pti.c                  |  7 +++---
>  9 files changed, 39 insertions(+), 62 deletions(-)
> 
> -- 
> 2.19.1.6.gb485710b
>