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Message-ID: <914aeb08-0534-48aa-2c2e-4e87d4360e29@manjaro.org>
Date:   Thu, 18 Feb 2021 10:18:39 +0100
From:   Tobias Schramm <t.schramm@...jaro.org>
To:     Icenowy Zheng <icenowy@...c.io>, Maxime Ripard <maxime@...no.tech>,
        Tobias Schramm <t.schramm@...jaro.org>
Cc:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
        Jernej Skrabec <jernej.skrabec@...l.net>,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: sunxi-ng: v3s: add support for variable rate audio
 pll output

Hi Icenowy,

 > We have introducee SDM-based accurate audio PLL on several
 > other SoCs. Some people is quite sensitive about audio-related things.
 >
While it is possible to support 24MHz * 128 / 25 / 5 = 24.576MHz without 
delta sigma modulation, matching 22.5792MHz is indeed not possible. I 
read you'd prefer me to use SDM like the other SoCs though? Shall I send 
a v2 utilizing SDM?

Cheers,
Tobias

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