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Message-Id: <20210222190738.2346378-5-mirela.rabulea@oss.nxp.com>
Date: Mon, 22 Feb 2021 21:07:33 +0200
From: Mirela Rabulea <mirela.rabulea@....nxp.com>
To: mchehab@...nel.org, hverkuil-cisco@...all.nl, shawnguo@...nel.org,
robh+dt@...nel.org, p.zabel@...gutronix.de
Cc: paul.kocialkowski@...tlin.com, linux-media@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-imx@....com,
s.hauer@...gutronix.de, aisheng.dong@....com,
daniel.baluta@....com, robert.chiras@....com,
laurentiu.palcu@....com, mark.rutland@....com,
devicetree@...r.kernel.org, ezequiel@...labora.com,
laurent.pinchart+renesas@...asonboard.com,
niklas.soderlund+renesas@...natech.se,
dafna.hirschfeld@...labora.com
Subject: [PATCH v8 4/9] arm64: dts: imx8qxp: Add jpeg encoder/decoder nodes
From: Mirela Rabulea <mirela.rabulea@....com>
Add jpeg decoder/encoder nodes, for now on imx8qxp only.
The same should work on imx8qm, but it was not tested.
Signed-off-by: Mirela Rabulea <mirela.rabulea@....com>
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 35 ++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index e46faac1fe71..ee822560af54 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -629,4 +629,39 @@ map0 {
};
};
};
+
+ img_subsys: bus@...00000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x58000000 0x0 0x58000000 0x1000000>;
+
+ jpegdec: jpegdec@...00000 {
+ compatible = "nxp,imx8qxp-jpgdec";
+ reg = <0x58400000 0x00050000 >;
+ interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
+ <&pd IMX_SC_R_MJPEG_DEC_S0>,
+ <&pd IMX_SC_R_MJPEG_DEC_S1>,
+ <&pd IMX_SC_R_MJPEG_DEC_S2>,
+ <&pd IMX_SC_R_MJPEG_DEC_S3>;
+ };
+
+ jpegenc: jpegenc@...50000 {
+ compatible = "nxp,imx8qxp-jpgenc";
+ reg = <0x58450000 0x00050000 >;
+ interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
+ <&pd IMX_SC_R_MJPEG_ENC_S0>,
+ <&pd IMX_SC_R_MJPEG_ENC_S1>,
+ <&pd IMX_SC_R_MJPEG_ENC_S2>,
+ <&pd IMX_SC_R_MJPEG_ENC_S3>;
+ };
+ };
};
--
2.25.1
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