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Message-Id: <20210223061830.1913700-9-daniel@0x0f.com>
Date: Tue, 23 Feb 2021 15:18:30 +0900
From: Daniel Palmer <daniel@...f.com>
To: devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
soc@...nel.org, sboyd@...nel.org
Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
w@....eu, Daniel Palmer <daniel@...f.com>
Subject: [PATCH 8/8] ARM: mstar: Add OPP table for mercury5
Add an OPP table for mercury5 so that cpu frequency scaling can
happen.
Signed-off-by: Daniel Palmer <daniel@...f.com>
---
arch/arm/boot/dts/mstar-mercury5.dtsi | 36 +++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/mstar-mercury5.dtsi b/arch/arm/boot/dts/mstar-mercury5.dtsi
index a7d0dd9d6132..80a19bd23c9c 100644
--- a/arch/arm/boot/dts/mstar-mercury5.dtsi
+++ b/arch/arm/boot/dts/mstar-mercury5.dtsi
@@ -6,6 +6,42 @@
#include "mstar-v7.dtsi"
+/ {
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ opp-microvolt = <800000 800000 850000>;
+ clock-latency-ns = <300000>;
+ };
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-microvolt = <850000 850000 880000>;
+ clock-latency-ns = <300000>;
+ };
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-microvolt = <880000 880000 890000>;
+ clock-latency-ns = <300000>;
+ };
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <900000 900000 1000000>;
+ clock-latency-ns = <300000>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <900000 900000 1000000>;
+ clock-latency-ns = <300000>;
+ };
+ };
+};
+
&imi {
reg = <0xa0000000 0x20000>;
};
--
2.30.0.rc2
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