[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20210223061830.1913700-6-daniel@0x0f.com>
Date: Tue, 23 Feb 2021 15:18:27 +0900
From: Daniel Palmer <daniel@...f.com>
To: devicetree@...r.kernel.org, linux-clk@...r.kernel.org,
soc@...nel.org, sboyd@...nel.org
Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
w@....eu, Daniel Palmer <daniel@...f.com>
Subject: [PATCH 5/8] ARM: mstar: Link cpupll to second core
The second core also sources it's clock from the CPU PLL.
Signed-off-by: Daniel Palmer <daniel@...f.com>
---
arch/arm/boot/dts/mstar-infinity2m.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/mstar-infinity2m.dtsi b/arch/arm/boot/dts/mstar-infinity2m.dtsi
index 6d4d1d224e96..dc339cd29778 100644
--- a/arch/arm/boot/dts/mstar-infinity2m.dtsi
+++ b/arch/arm/boot/dts/mstar-infinity2m.dtsi
@@ -11,6 +11,8 @@ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x1>;
+ clocks = <&cpupll>;
+ clock-names = "cpuclk";
};
};
--
2.30.0.rc2
Powered by blists - more mailing lists