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Message-ID: <161428210272.1254594.16034240343090747878@swboyd.mtv.corp.google.com>
Date:   Thu, 25 Feb 2021 11:41:42 -0800
From:   Stephen Boyd <swboyd@...omium.org>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        Rajendra Nayak <rnayak@...eaurora.org>,
        Sibi Sankar <sibis@...eaurora.org>,
        Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
Subject: Re: [PATCH 8/9] arm64: dts: qcom: sc7280: Add AOSS QMP node

Quoting Sai Prakash Ranjan (2021-02-25 01:30:24)
> Add a DT node for the AOSS QMP on SC7280 SoC.
> 
> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7280.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 65c1e0f2fb56..cbd567ccc04e 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -9,6 +9,7 @@
>  #include <dt-bindings/clock/qcom,rpmh.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/mailbox/qcom-ipcc.h>
> +#include <dt-bindings/power/qcom-aoss-qmp.h>
>  #include <dt-bindings/soc/qcom,rpmh-rsc.h>
>  
>  / {
> @@ -368,6 +369,19 @@ pdc: interrupt-controller@...0000 {
>                         interrupt-controller;
>                 };
>  
> +               aoss_qmp: qmp@...0000 {

power-domain-controller@...0000? power-controller@...0000?

> +                       compatible = "qcom,sc7280-aoss-qmp";
> +                       reg = <0 0x0c300000 0 0x100000>;
> +                       interrupts-extended = <&ipcc IPCC_CLIENT_AOP
> +                                                    IPCC_MPROC_SIGNAL_GLINK_QMP
> +                                                    IRQ_TYPE_EDGE_RISING>;
> +                       mboxes = <&ipcc IPCC_CLIENT_AOP
> +                                       IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> +                       #clock-cells = <0>;
> +                       #power-domain-cells = <1>;
> +               };
> +
>                 spmi_bus: qcom,spmi@...0000 {

Ick, should be spmi@

>                         compatible = "qcom,spmi-pmic-arb";
>                         reg = <0 0x0c440000 0 0x1100>,

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