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Message-ID: <6543a335-e84c-29ea-e20b-c56bdd60d1c6@hygon.cn>
Date: Mon, 1 Mar 2021 02:16:26 +0000
From: Wen Pu <puwen@...on.cn>
To: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC: "linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
"rjw@...ysocki.net" <rjw@...ysocki.net>,
"rafael@...nel.org" <rafael@...nel.org>,
"bp@...en8.de" <bp@...en8.de>,
"victording@...gle.com" <victording@...gle.com>,
"kim.phillips@....com" <kim.phillips@....com>,
"rui.zhang@...el.com" <rui.zhang@...el.com>
Subject: Re: [RFC PATCH] powercap: Add Hygon Fam18h RAPL support
On 2021/2/28 23:42, Srinivas Pandruvada wrote:
> On Thu, 2021-02-25 at 21:01 +0800, Pu Wen wrote:
>> Enable Hygon Fam18h RAPL support for the power capping framework.
>>
> If this patch is tested and works on this processor, not sure why this
> is RFC?
This patch is tested and works on Hygon processor. The 'RFC' is automated
generated by my script ;)
Thanks,
Pu Wen
> Thanks,
> Srinivas
>
>> Signed-off-by: Pu Wen <puwen@...on.cn>
>> ---
>> drivers/powercap/intel_rapl_common.c | 1 +
>> drivers/powercap/intel_rapl_msr.c | 1 +
>> 2 files changed, 2 insertions(+)
>>
>> diff --git a/drivers/powercap/intel_rapl_common.c
>> b/drivers/powercap/intel_rapl_common.c
>> index fdda2a737186..73cf68af9770 100644
>> --- a/drivers/powercap/intel_rapl_common.c
>> +++ b/drivers/powercap/intel_rapl_common.c
>> @@ -1069,6 +1069,7 @@ static const struct x86_cpu_id rapl_ids[]
>> __initconst = {
>>
>> X86_MATCH_VENDOR_FAM(AMD, 0x17, &rapl_defaults_amd),
>> X86_MATCH_VENDOR_FAM(AMD, 0x19, &rapl_defaults_amd),
>> + X86_MATCH_VENDOR_FAM(HYGON, 0x18, &rapl_defaults_amd),
>> {}
>> };
>> MODULE_DEVICE_TABLE(x86cpu, rapl_ids);
>> diff --git a/drivers/powercap/intel_rapl_msr.c
>> b/drivers/powercap/intel_rapl_msr.c
>> index 78213d4b5b16..cc3b22881bfe 100644
>> --- a/drivers/powercap/intel_rapl_msr.c
>> +++ b/drivers/powercap/intel_rapl_msr.c
>> @@ -150,6 +150,7 @@ static int rapl_msr_probe(struct platform_device
>> *pdev)
>> case X86_VENDOR_INTEL:
>> rapl_msr_priv = &rapl_msr_priv_intel;
>> break;
>> + case X86_VENDOR_HYGON:
>> case X86_VENDOR_AMD:
>> rapl_msr_priv = &rapl_msr_priv_amd;
>> break;
>
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