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Message-ID: <CAPDyKFqBdYf4A6xEiPUu4qKSmNYMfC9WnxfTrjc5zgRdcre5cw@mail.gmail.com>
Date:   Tue, 2 Mar 2021 11:39:19 +0100
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     Renius Chen <reniuschengl@...il.com>
Cc:     Adrian Hunter <adrian.hunter@...el.com>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Ben Chuang <ben.chuang@...esyslogic.com.tw>,
        greg.tu@...esyslogic.com.tw
Subject: Re: [PATCH] mmc: sdhci-pci-gli: Enable short circuit protection
 mechanism of GL9755

On Thu, 25 Feb 2021 at 12:13, Renius Chen <reniuschengl@...il.com> wrote:
>
> Short circuit protection mechanism of GL9755 is disabled by HW default
> setting. Enable short circuit protection to prevent GL9755 from being
> damaged by short circuit or over current.
>
> Signed-off-by: Renius Chen <reniuschengl@...il.com>

Applied for next, thanks!

Kind regards
Uffe


> ---
>  drivers/mmc/host/sdhci-pci-gli.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index 5606bdc08a96..7ba0fd601696 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -123,6 +123,9 @@
>  #define PCI_GLI_9755_PLLSSC        0x68
>  #define   PCI_GLI_9755_PLLSSC_PPM    GENMASK(15, 0)
>
> +#define PCI_GLI_9755_SerDes  0x70
> +#define PCI_GLI_9755_SCP_DIS   BIT(19)
> +
>  #define GLI_MAX_TUNING_LOOP 40
>
>  /* Genesys Logic chipset */
> @@ -547,6 +550,11 @@ static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
>         value &= ~PCI_GLI_9755_DMACLK;
>         pci_write_config_dword(pdev, PCI_GLI_9755_PECONF, value);
>
> +       /* enable short circuit protection */
> +       pci_read_config_dword(pdev, PCI_GLI_9755_SerDes, &value);
> +       value &= ~PCI_GLI_9755_SCP_DIS;
> +       pci_write_config_dword(pdev, PCI_GLI_9755_SerDes, value);
> +
>         gl9755_wt_off(pdev);
>  }
>
> --
> 2.27.0
>

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