linux-kernel - Re: [RFC PATCH v4 3/3] scheduler: Add cluster scheduler level for x86

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <YD4T0qBBgR6fPbQb@hirez.programming.kicks-ass.net>
Date:   Tue, 2 Mar 2021 11:30:43 +0100
From:   Peter Zijlstra <peterz@...radead.org>
To:     Barry Song <song.bao.hua@...ilicon.com>
Cc:     tim.c.chen@...ux.intel.com, catalin.marinas@....com,
        will@...nel.org, rjw@...ysocki.net, vincent.guittot@...aro.org,
        bp@...en8.de, tglx@...utronix.de, mingo@...hat.com,
        lenb@...nel.org, dietmar.eggemann@....com, rostedt@...dmis.org,
        bsegall@...gle.com, mgorman@...e.de, msys.mizuma@...il.com,
        valentin.schneider@....com, gregkh@...uxfoundation.org,
        jonathan.cameron@...wei.com, juri.lelli@...hat.com,
        mark.rutland@....com, sudeep.holla@....com,
        aubrey.li@...ux.intel.com, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-acpi@...r.kernel.org,
        x86@...nel.org, xuwei5@...wei.com, prime.zeng@...ilicon.com,
        guodong.xu@...aro.org, yangyicong@...wei.com,
        liguozhu@...ilicon.com, linuxarm@...neuler.org, hpa@...or.com
Subject: Re: [RFC PATCH v4 3/3] scheduler: Add cluster scheduler level for x86

On Tue, Mar 02, 2021 at 11:59:40AM +1300, Barry Song wrote:
> From: Tim Chen <tim.c.chen@...ux.intel.com>
> 
> There are x86 CPU architectures (e.g. Jacobsville) where L2 cahce
> is shared among a cluster of cores instead of being exclusive
> to one single core.

Isn't that most atoms one way or another? Tremont seems to have it per 4
cores, but earlier it was per 2 cores.