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Date:   Thu, 4 Mar 2021 19:37:00 +0800
From:   Shawn Guo <shawnguo@...nel.org>
To:     Michael Walle <michael@...le.cc>
Cc:     linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, Li Yang <leoyang.li@....com>,
        Rob Herring <robh+dt@...nel.org>,
        Vladimir Oltean <vladimir.oltean@....com>
Subject: Re: [PATCH] arm64: dts: ls1028a: add interrupt to Root Complex Event
 Collector

On Tue, Feb 09, 2021 at 01:52:59AM +0100, Michael Walle wrote:
> The legacy interrupt INT_A is hardwired to the event collector. RCEC is
> bascially supported starting with v5.11. Having a correct interrupt, will
> make RCEC at least probe correctly.
> 
> There are still issues with how RCEC is implemented in the RCiEP on the
> LS1028A. RCEC will report an error, but it cannot find the correct
> subdevice.
> 
> Signed-off-by: Michael Walle <michael@...le.cc>
> ---
>  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index 262fbad8f0ec..c1f2f402ad53 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -1114,6 +1114,12 @@
>  					full-duplex;
>  				};
>  			};
> +
> +			rcec@1f,0 {

Just curious how unit-address comes to '1f,0'?

Shawn

> +				reg = <0x00f800 0 0 0 0>;
> +				/* IEP INT_A */
> +				interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
> +			};
>  		};
>  
>  		rcpm: power-controller@...4040 {
> -- 
> 2.20.1
> 

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