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Date:   Fri, 5 Mar 2021 17:09:40 -0600
From:   Rob Herring <robh@...nel.org>
To:     Andrew Jeffery <andrew@...id.au>
Cc:     openipmi-developer@...ts.sourceforge.net, openbmc@...ts.ozlabs.org,
        minyard@....org, joel@....id.au, lee.jones@...aro.org,
        avifishman70@...il.com, tmaimon77@...il.com, tali.perry1@...il.com,
        venture@...gle.com, yuenn@...gle.com, benjaminfair@...gle.com,
        linus.walleij@...aro.org, chiawei_wang@...eedtech.com,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-aspeed@...ts.ozlabs.org, linux-gpio@...r.kernel.org
Subject: Re: [PATCH 17/19] dt-bindings: ipmi: Add optional SerIRQ property to
 ASPEED KCS devices

On Sat, Feb 20, 2021 at 12:55:21AM +1030, Andrew Jeffery wrote:
> Allocating IO and IRQ resources to LPC devices is in-theory an operation
> for the host, however ASPEED don't appear to expose this capability
> outside the BMC (e.g. SuperIO). Instead, we are left with BMC-internal
> registers for managing these resources, so introduce a devicetree
> property for KCS devices to describe SerIRQ properties.
> 
> Signed-off-by: Andrew Jeffery <andrew@...id.au>
> ---
>  .../bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml      | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml
> index 1c1cc4265948..808475a2c2ca 100644
> --- a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml
> +++ b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml
> @@ -47,6 +47,18 @@ properties:
>        channels the status address is derived from the data address, but the
>        status address may be optionally provided.
>  
> +  aspeed,lpc-interrupts:
> +    $ref: "/schemas/types.yaml#/definitions/uint32-matrix"
> +    minItems: 1
> +    maxItems: 1
> +    description: |
> +      A 2-cell property expressing the LPC SerIRQ number and the interrupt
> +      level/sense encoding (specified in the standard fashion).

That would be uint32-array with 'maxItems: 2'.

> +
> +      Note that the generated interrupt is issued from the BMC to the host, and
> +      thus the target interrupt controller is not captured by the BMC's
> +      devicetree.
> +
>    kcs_chan:
>      deprecated: true
>      $ref: '/schemas/types.yaml#/definitions/uint32'
> @@ -84,9 +96,11 @@ allOf:
>  
>  examples:
>    - |
> +    #include <dt-bindings/interrupt-controller/irq.h>
>      kcs3: kcs@24 {
>          compatible = "aspeed,ast2600-kcs-bmc";
>          reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
>          aspeed,lpc-io-reg = <0xca2>;
> +        aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
>          interrupts = <8>;
>      };
> -- 
> 2.27.0
> 

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