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Message-ID: <20210308201142.GA2883896@robh.at.kernel.org>
Date: Mon, 8 Mar 2021 13:11:42 -0700
From: Rob Herring <robh@...nel.org>
To: Atish Patra <atish.patra@....com>
Cc: Ivan.Griffin@...rochip.com, Anup Patel <anup.patel@....com>,
Alistair Francis <alistair.francis@....com>,
linux-riscv@...ts.infradead.org, Albert Ou <aou@...s.berkeley.edu>,
Palmer Dabbelt <palmer@...belt.com>,
devicetree@...r.kernel.org,
Björn Töpel <bjorn@...nel.org>,
Daire McNamara <daire.mcnamara@...rochip.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Conor.Dooley@...rochip.com, linux-kernel@...r.kernel.org,
Lewis.Hanly@...rochip.com, Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH v4 2/5] dt-bindings: riscv: microchip: Add YAML
documentation for the PolarFire SoC
On Wed, 03 Mar 2021 12:02:50 -0800, Atish Patra wrote:
> Add YAML DT binding documentation for the Microchip PolarFire SoC.
> It is documented at:
>
> https://www.microsemi.com/products/fpga-soc/polarfire-soc-icicle-quick-start-guide
>
> Signed-off-by: Atish Patra <atish.patra@....com>
> ---
> .../devicetree/bindings/riscv/microchip.yaml | 27 +++++++++++++++++++
> 1 file changed, 27 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml
>
Reviewed-by: Rob Herring <robh@...nel.org>
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