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Date: Wed, 3 Mar 2021 12:02:53 -0800
From: Atish Patra <atish.patra@....com>
To: linux-kernel@...r.kernel.org
Cc: Conor Dooley <conor.dooley@...rochip.com>,
Albert Ou <aou@...s.berkeley.edu>,
Alistair Francis <alistair.francis@....com>,
Anup Patel <anup.patel@....com>,
Atish Patra <atish.patra@....com>,
Björn Töpel <bjorn@...nel.org>,
devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh+dt@...nel.org>, Conor.Dooley@...rochip.com,
Daire McNamara <daire.mcnamara@...rochip.com>,
Ivan.Griffin@...rochip.com, Lewis.Hanly@...rochip.com
Subject: [PATCH v4 5/5] MAINTAINERS: add microchip polarfire soc support
From: Conor Dooley <conor.dooley@...rochip.com>
Add Cyril Jean and Lewis Hanly as maintainers for the Microchip SoC
directory
Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
MAINTAINERS | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d92f85ca831d..cf186eca1784 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -15358,6 +15358,14 @@ F: arch/riscv/
N: riscv
K: riscv
+RISC-V/MICROCHIP POLARFIRE SOC SUPPORT
+M: Lewis Hanly <lewis.hanly@...rochip.com>
+M: Cyril Jean <cyril.jean@...rochip.com>
+L: linux-riscv@...ts.infradead.org
+S: Supported
+F: drivers/soc/microchip/
+F: include/soc/microchip/mpfs.h
+
RNBD BLOCK DRIVERS
M: Danil Kipnis <danil.kipnis@...ud.ionos.com>
M: Jack Wang <jinpu.wang@...ud.ionos.com>
--
2.25.1
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