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Message-ID: <20210317155121.19cbb50c@xps13>
Date: Wed, 17 Mar 2021 15:51:21 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: richard@....at, vigneshr@...com, robh+dt@...nel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
boris.brezillon@...labora.com, Daniele.Palmas@...it.com,
bjorn.andersson@...aro.org
Subject: Re: [PATCH v5 0/3] Add support for secure regions in NAND
Hi Manivannan,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org> wrote on Wed,
17 Mar 2021 17:55:10 +0530:
> On a typical end product, a vendor may choose to secure some regions in
> the NAND memory which are supposed to stay intact between FW upgrades.
> The access to those regions will be blocked by a secure element like
> Trustzone. So the normal world software like Linux kernel should not
> touch these regions (including reading).
>
> So this series adds a property for declaring such secure regions in DT
> so that the driver can skip touching them. While at it, the Qcom NANDc
> DT binding is also converted to YAML format.
>
> Thanks,
> Mani
>
> Changes in v5:
>
> * Switched to "uint64-matrix" as suggested by Rob
> * Moved the whole logic from qcom driver to nand core as suggested by Boris
I'm really thinking about a nand-wide property now. Do you think it
makes sense to move the helper to the NAND core (instead of the raw
NAND core)? I'm fine only using it in the raw NAND core though.
Also, can I request a global s/sec/secure/ update? I find the "sec"
abbreviation unclear and I think we have more than enough cryptic
names :-)
Thanks,
Miquèl
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