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Message-ID: <YFHWgOAEWrOZ+zPf@hirez.programming.kicks-ass.net>
Date: Wed, 17 Mar 2021 11:14:24 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Ingo Molnar <mingo@...nel.org>
Cc: "Yu, Yu-cheng" <yu-cheng.yu@...el.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, linux-mm@...ck.org,
linux-arch@...r.kernel.org, linux-api@...r.kernel.org,
Arnd Bergmann <arnd@...db.de>,
Andy Lutomirski <luto@...nel.org>,
Balbir Singh <bsingharora@...il.com>,
Borislav Petkov <bp@...en8.de>,
Cyrill Gorcunov <gorcunov@...il.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Eugene Syromiatnikov <esyr@...hat.com>,
Florian Weimer <fweimer@...hat.com>,
"H.J. Lu" <hjl.tools@...il.com>, Jann Horn <jannh@...gle.com>,
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Randy Dunlap <rdunlap@...radead.org>,
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Weijiang Yang <weijiang.yang@...el.com>,
Pengfei Xu <pengfei.xu@...el.com>,
Haitao Huang <haitao.huang@...el.com>
Subject: Re: [PATCH v23 00/28] Control-flow Enforcement: Shadow Stack
On Wed, Mar 17, 2021 at 10:18:00AM +0100, Ingo Molnar wrote:
>
> * Yu, Yu-cheng <yu-cheng.yu@...el.com> wrote:
>
> > On 3/16/2021 2:15 PM, Peter Zijlstra wrote:
> > > On Tue, Mar 16, 2021 at 08:10:26AM -0700, Yu-cheng Yu wrote:
> > > > Control-flow Enforcement (CET) is a new Intel processor feature that blocks
> > > > return/jump-oriented programming attacks. Details are in "Intel 64 and
> > > > IA-32 Architectures Software Developer's Manual" [1].
> > > >
> > > > CET can protect applications and the kernel. This series enables only
> > > > application-level protection, and has three parts:
> > > >
> > > > - Shadow stack [2],
> > > > - Indirect branch tracking [3], and
> > > > - Selftests [4].
> > >
> > > CET is marketing; afaict SS and IBT are 100% independent and there's no
> > > reason what so ever to have them share any code, let alone a Kconfig
> > > knob.
> >
> > We used to have shadow stack and ibt under separate Kconfig options, but in
> > a few places they actually share same code path, such as the XSAVES
> > supervisor states and ELF header for example. Anyways I will be happy to
> > make changes again if there is agreement.
>
> I was look at:
>
> x86/fpu/xstate: Introduce CET MSR and XSAVES supervisor states
>
> didn't see any IBT logic - it's essentially all shadow stack state.
>
> Which is not surprising, forward call edge integrity protection (IBT)
> requires very little state, does it?
They hid the IBT enable bit in the U_CET MSR, which is in the XSAVE
thing.
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