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Message-Id: <1616158446-19290-1-git-send-email-kalyan_t@codeaurora.org>
Date:   Fri, 19 Mar 2021 05:54:06 -0700
From:   Kalyan Thota <kalyan_t@...eaurora.org>
To:     y@...lcomm.com, dri-devel@...ts.freedesktop.org,
        linux-arm-msm@...r.kernel.org, freedreno@...ts.freedesktop.org,
        devicetree@...r.kernel.org
Cc:     Kalyan Thota <kalyan_t@...eaurora.org>,
        linux-kernel@...r.kernel.org, robdclark@...il.com,
        dianders@...omium.org, mkrishn@...eaurora.org
Subject: [v1] drm/msm/disp/dpu1: fix display underruns during modeset.

During crtc disable, display perf structures are reset to 0
which includes state varibles which are immutable. On crtc
enable, we use the same structures and they don't refelect
the actual values

1) Fix is to avoid updating the state structures during disable.
2) Reset the perf structures during atomic check when there is no
modeset enable.

Signed-off-by: Kalyan Thota <kalyan_t@...eaurora.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 1 -
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c      | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index 37c8270..b4cd479 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -382,7 +382,6 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc,
 	} else {
 		DPU_DEBUG("crtc=%d disable\n", crtc->base.id);
 		memset(old, 0, sizeof(*old));
-		memset(new, 0, sizeof(*new));
 		update_bus = true;
 		update_clk = true;
 	}
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 9a80981..a821e2c 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -912,6 +912,7 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
 	if (!state->enable || !state->active) {
 		DPU_DEBUG("crtc%d -> enable %d, active %d, skip atomic_check\n",
 				crtc->base.id, state->enable, state->active);
+		memset(&cstate->new_perf, 0, sizeof(cstate->new_perf));
 		goto end;
 	}
 
-- 
2.7.4

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