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Message-ID: <20210323111524.GD29286@e121166-lin.cambridge.arm.com>
Date:   Tue, 23 Mar 2021 11:15:24 +0000
From:   Lorenzo Pieralisi <lorenzo.pieralisi@....com>
To:     Zhiqiang Hou <Zhiqiang.Hou@....com>
Cc:     linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, bhelgaas@...gle.com,
        robh+dt@...nel.org, shawnguo@...nel.org, leoyang.li@....com,
        gustavo.pimentel@...opsys.com, minghuan.Lian@....com,
        mingkai.hu@....com, roy.zang@....com
Subject: Re: [PATCH 0/7] PCI: layerscape: Add power management support

On Mon, Sep 07, 2020 at 01:37:54PM +0800, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@....com>
> 
> This patch series is to add PCIe power management support for NXP
> Layerscape platfroms.
> 
> Hou Zhiqiang (7):
>   PCI: dwc: Fix a bug of the case dw_pci->ops is NULL
>   PCI: layerscape: Change to use the DWC common link-up check function
>   dt-bindings: pci: layerscape-pci: Add a optional property big-endian
>   arm64: dts: layerscape: Add big-endian property for PCIe nodes
>   dt-bindings: pci: layerscape-pci: Update the description of SCFG
>     property
>   dts: arm64: ls1043a: Add SCFG phandle for PCIe nodes
>   PCI: layerscape: Add power management support
> 
>  .../bindings/pci/layerscape-pci.txt           |   6 +-
>  .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi |   1 +
>  .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi |   6 +
>  .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi |   3 +
>  drivers/pci/controller/dwc/pci-layerscape.c   | 473 ++++++++++++++----
>  drivers/pci/controller/dwc/pcie-designware.c  |  12 +-
>  drivers/pci/controller/dwc/pcie-designware.h  |   1 +
>  7 files changed, 388 insertions(+), 114 deletions(-)

I don't know which patches are still applicable, I will mark this
series as superseded since you will have to rebase it anyway - please
let me know what's the plan.

Thanks,
Lorenzo

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