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Message-Id: <1616564059-8713-3-git-send-email-hongxing.zhu@nxp.com>
Date: Wed, 24 Mar 2021 13:34:18 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: l.stach@...gutronix.de, andrew.smirnov@...il.com,
shawnguo@...nel.org, kw@...ux.com, bhelgaas@...gle.com,
stefan@...er.ch, lorenzo.pieralisi@....com
Cc: linux-pci@...r.kernel.org, linux-imx@....com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
kernel@...gutronix.de, Richard Zhu <hongxing.zhu@....com>
Subject: [PATCH v2 2/3] arm64: dts: imx8mq-evk: add one regulator used to power up pcie phy
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
turned on.
Signed-off-by: Richard Zhu <hongxing.zhu@....com>
---
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 85b045253a0e..4d2035e3dd7c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -318,6 +318,7 @@
<&clk IMX8MQ_CLK_PCIE1_PHY>,
<&pcie0_refclk>;
clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ vph-supply = <&vgen5_reg>;
status = "okay";
};
--
2.17.1
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