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Message-ID: <CAB5KdOZq+2ETburoMv6Vnnj3MFAuvwnSBsSmiBO=nH1Ajdp5_g@mail.gmail.com>
Date: Thu, 25 Mar 2021 21:22:11 +0800
From: Haiwei Li <lihaiwei.kernel@...il.com>
To: LKML <linux-kernel@...r.kernel.org>, kvm list <kvm@...r.kernel.org>
Cc: Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <seanjc@...gle.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>,
Haiwei Li <lihaiwei@...cent.com>
Subject: Re: [PATCH] KVM: VMX: Check the corresponding bits according to the
intel sdm
On Tue, Mar 23, 2021 at 10:37 AM <lihaiwei.kernel@...il.com> wrote:
>
> From: Haiwei Li <lihaiwei@...cent.com>
>
> According to IA-32 SDM Vol.3D "A.1 BASIC VMX INFORMATION", two inspections
> are missing.
> * Bit 31 is always 0. Earlier versions of this manual specified that the
> VMCS revision identifier was a 32-bit field in bits 31:0 of this MSR. For
> all processors produced prior to this change, bit 31 of this MSR was read
> as 0.
> * The values of bits 47:45 and bits 63:57 are reserved and are read as 0.
>
> Signed-off-by: Haiwei Li <lihaiwei@...cent.com>
> ---
> arch/x86/kvm/vmx/vmx.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 32cf828..0d6d13c 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -2577,6 +2577,20 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf,
>
> rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
>
> + /*
> + * IA-32 SDM Vol 3D: Bit 31 is always 0.
> + * For all earlier processors, bit 31 of this MSR was read as 0.
> + */
> + if (vmx_msr_low & (1u<<31))
> + return -EIO;
Drop this code as Jim said.
> +
> + /*
> + * IA-32 SDM Vol 3D: bits 47:45 and bits 63:57 are reserved and are read
> + * as 0.
> + */
> + if (vmx_msr_high & 0xfe00e000)
> + return -EIO;
Is this ok? Can we pick up the part? :)
--
Haiwei Li
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