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Date: Mon, 29 Mar 2021 19:08:42 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Hsin-Yi Wang <hsinyi@...omium.org>,
Michael Kao <michael.kao@...iatek.com>
Cc: fan.chen@...iatek.com, Zhang Rui <rui.zhang@...el.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Linux PM <linux-pm@...r.kernel.org>,
srv_heupstream@...iatek.com,
Eduardo Valentin <edubezval@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Devicetree List <devicetree@...r.kernel.org>,
lkml <linux-kernel@...r.kernel.org>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>
Subject: Re: [v7,1/3] arm64: dts: mt8183: add thermal zone node
On 22/03/2021 12:20, Hsin-Yi Wang wrote:
> On Tue, Mar 16, 2021 at 3:02 PM Michael Kao <michael.kao@...iatek.com> wrote:
>>
>> From: "michael.kao" <michael.kao@...iatek.com>
>>
>> Add thermal zone node to Mediatek MT8183 dts file.
>>
>> Evaluate the thermal zone every 500ms while not cooling
>> and every 100ms when passive cooling is performed.
>>
>> Signed-off-by: Matthias Kaehlcke <mka@...omium.org>
>> Signed-off-by: Michael Kao <michael.kao@...iatek.com>
>
> Tested-by: Hsin-Yi Wang <hsinyi@...omium.org>
>
Applied to v5.12-next/dts64
Thanks!
> Tested this patch on mt8183 devices.
>
>> ---
>> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 85 ++++++++++++++++++++++++
>> 1 file changed, 85 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>> index 5b782a4769e7..d3550af06408 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
>> @@ -657,6 +657,87 @@
>> status = "disabled";
>> };
>>
>> + thermal: thermal@...0b000 {
>> + #thermal-sensor-cells = <1>;
>> + compatible = "mediatek,mt8183-thermal";
>> + reg = <0 0x1100b000 0 0x1000>;
>> + clocks = <&infracfg CLK_INFRA_THERM>,
>> + <&infracfg CLK_INFRA_AUXADC>;
>> + clock-names = "therm", "auxadc";
>> + resets = <&infracfg MT8183_INFRACFG_AO_THERM_SW_RST>;
>> + interrupts = <0 76 IRQ_TYPE_LEVEL_LOW>;
>> + mediatek,auxadc = <&auxadc>;
>> + mediatek,apmixedsys = <&apmixedsys>;
>> + nvmem-cells = <&thermal_calibration>;
>> + nvmem-cell-names = "calibration-data";
>> + };
>> +
>> + thermal-zones {
>> + cpu_thermal: cpu_thermal {
>> + polling-delay-passive = <100>;
>> + polling-delay = <500>;
>> + thermal-sensors = <&thermal 0>;
>> + sustainable-power = <5000>;
>> + };
>> +
>> + /* The tzts1 ~ tzts6 don't need to polling */
>> + /* The tzts1 ~ tzts6 don't need to thermal throttle */
>> +
>> + tzts1: tzts1 {
>> + polling-delay-passive = <0>;
>> + polling-delay = <0>;
>> + thermal-sensors = <&thermal 1>;
>> + sustainable-power = <5000>;
>> + trips {};
>> + cooling-maps {};
>> + };
>> +
>> + tzts2: tzts2 {
>> + polling-delay-passive = <0>;
>> + polling-delay = <0>;
>> + thermal-sensors = <&thermal 2>;
>> + sustainable-power = <5000>;
>> + trips {};
>> + cooling-maps {};
>> + };
>> +
>> + tzts3: tzts3 {
>> + polling-delay-passive = <0>;
>> + polling-delay = <0>;
>> + thermal-sensors = <&thermal 3>;
>> + sustainable-power = <5000>;
>> + trips {};
>> + cooling-maps {};
>> + };
>> +
>> + tzts4: tzts4 {
>> + polling-delay-passive = <0>;
>> + polling-delay = <0>;
>> + thermal-sensors = <&thermal 4>;
>> + sustainable-power = <5000>;
>> + trips {};
>> + cooling-maps {};
>> + };
>> +
>> + tzts5: tzts5 {
>> + polling-delay-passive = <0>;
>> + polling-delay = <0>;
>> + thermal-sensors = <&thermal 5>;
>> + sustainable-power = <5000>;
>> + trips {};
>> + cooling-maps {};
>> + };
>> +
>> + tztsABB: tztsABB {
>> + polling-delay-passive = <0>;
>> + polling-delay = <0>;
>> + thermal-sensors = <&thermal 6>;
>> + sustainable-power = <5000>;
>> + trips {};
>> + cooling-maps {};
>> + };
>> + };
>> +
>> pwm0: pwm@...0e000 {
>> compatible = "mediatek,mt8183-disp-pwm";
>> reg = <0 0x1100e000 0 0x1000>;
>> @@ -926,6 +1007,10 @@
>> reg = <0 0x11f10000 0 0x1000>;
>> #address-cells = <1>;
>> #size-cells = <1>;
>> + thermal_calibration: calib@180 {
>> + reg = <0x180 0xc>;
>> + };
>> +
>> mipi_tx_calibration: calib@190 {
>> reg = <0x190 0xc>;
>> };
>> --
>> 2.18.0
>>
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