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Message-Id: <161729966152.12691.6136048726737117285.b4-ty@canonical.com>
Date: Thu, 1 Apr 2021 19:54:30 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: Jonathan Hunter <jonathanh@...dia.com>,
Rob Herring <robh+dt@...nel.org>,
Dmitry Osipenko <digetx@...il.com>,
Thierry Reding <thierry.reding@...il.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
linux-kernel@...r.kernel.org, linux-tegra@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: (subset) [PATCH v2 0/6] NVIDIA Tegra memory improvements
On Wed, 31 Mar 2021 02:04:39 +0300, Dmitry Osipenko wrote:
> This series replaces the raw voltage regulator with a power domain that
> will be managing SoC core voltage. The core power domain patches are still
> under review, but it's clear at this point that this is the way we will
> implement the DVFS support.
>
> The remaining Tegra20 memory bindings are converted to schema. I also
> made a small improvement to the memory drivers.
>
> [...]
Applied, thanks!
[4/6] dt-bindings: memory: tegra20: mc: Convert to schema
commit: 6553fa57cb1707396ad3a27dc78fa61e1750ab31
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
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