linux-kernel - Re: [PATCH v2] powerpc/traps: Enhance readability for trap types

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Message-Id: <1617322416.z3cicnpfxy.astroid@bobo.none>
Date:   Fri, 02 Apr 2021 10:36:45 +1000
From:   Nicholas Piggin <npiggin@...il.com>
To:     Segher Boessenkool <segher@...nel.crashing.org>,
        Xiongwei Song <sxwjean@...il.com>
Cc:     aik@...abs.ru, akpm@...ux-foundation.org, alistair@...ple.id.au,
        aneesh.kumar@...ux.ibm.com, atrajeev@...ux.vnet.ibm.com,
        benh@...nel.crashing.org, christophe.leroy@...roup.eu,
        haren@...ux.ibm.com, jniethe5@...il.com, john.ogness@...utronix.de,
        kan.liang@...ux.intel.com, kjain@...ux.ibm.com,
        kvm-ppc@...r.kernel.org, leobras.c@...il.com,
        linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org,
        maddy@...ux.ibm.com, mikey@...ling.org,
        Michael Ellerman <mpe@...erman.id.au>, msuchanek@...e.de,
        oleg@...hat.com, paulus@...ba.org, peterx@...hat.com,
        peterz@...radead.org, pmladek@...e.com,
        ravi.bangoria@...ux.ibm.com, rppt@...nel.org,
        Xiongwei Song <sxwjean@...com>
Subject: Re: [PATCH v2] powerpc/traps: Enhance readability for trap types

Excerpts from Segher Boessenkool's message of April 2, 2021 2:11 am:
> On Thu, Apr 01, 2021 at 10:55:58AM +0800, Xiongwei Song wrote:
>> Segher Boessenkool <segher@...nel.crashing.org> 于2021年4月1日周四 上午6:15写道：
>> 
>> > On Wed, Mar 31, 2021 at 08:58:17PM +1100, Michael Ellerman wrote:
>> > > So perhaps:
>> > >
>> > >   EXC_SYSTEM_RESET
>> > >   EXC_MACHINE_CHECK
>> > >   EXC_DATA_STORAGE
>> > >   EXC_DATA_SEGMENT
>> > >   EXC_INST_STORAGE
>> > >   EXC_INST_SEGMENT
>> > >   EXC_EXTERNAL_INTERRUPT
>> > >   EXC_ALIGNMENT
>> > >   EXC_PROGRAM_CHECK
>> > >   EXC_FP_UNAVAILABLE
>> > >   EXC_DECREMENTER
>> > >   EXC_HV_DECREMENTER
>> > >   EXC_SYSTEM_CALL
>> > >   EXC_HV_DATA_STORAGE
>> > >   EXC_PERF_MONITOR
>> >
>> > These are interrupt (vectors), not exceptions.  It doesn't matter all
>> > that much, but confusing things more isn't useful either!  There can be
>> > multiple exceptions that all can trigger the same interrupt.
>> >
>> >  When looking at the reference manual of e500 and e600 from NXP
>>  official, they call them as interrupts.While looking at the "The
>> Programming Environments"
>>  that is also from NXP, they call them exceptions. Looks like there is
>>  no explicit distinction between interrupts and exceptions.
> 
> The architecture documents have always called it interrupts.  The PEM
> says it calls them exceptions instead, but they are called interrupts in
> the architecture (and the PEM says that, too).
> 
>> Here is the "The Programming Environments" link:
>> https://www.nxp.com.cn/docs/en/user-guide/MPCFPE_AD_R1.pdf
> 
> That document is 24 years old.  The architecture is still published,
> new versions regularly.
> 
>> As far as I know, the values of interrupts or exceptions above are defined
>> explicitly in reference manual or the programming environments.
> 
> They are defined in the architecture.
> 
>> Could
>> you please provide more details about multiple exceptions with the same
>> interrupts?
> 
> The simplest example is 700, program interrupt.  There are many causes
> for it, including all the exceptions in FPSCR: VX, ZX, OX, UX, XX, and
> VX is actually divided into nine separate cases itself.  There also are
> the various causes of privileged instruction type program interrupts,
> and  the trap type program interrupt, but the FEX ones are most obvious
> here.

Also:

* Some interrupts have no corresponding exception (system call and 
system call vectored). This is not just semantics or a bug in the ISA
because it is different from other synchronous interrupts: instructions 
which cause exceptions (e.g., a page fault) do not complete before 
taking the interrupt whereas sc does.

* It's quite usual for an exception to not cause an interrupt 
immediately (MSR[EE]=0, HMEER) or never cause one and be cleared by 
other means (msgclr, mtDEC, mtHMER, etc).

* It's possible for an exception to cause different interrupts!
A decrementer exception usually causes a decrementer interrupt, but it
can cause a system reset interrupt if the processor was in a power
saving mode. A data storage exception can cause a DSI or HDSI interrupt
depending on LPCR settings, and many other examples.

So I agree with Segher on this. We should use interrupt for interrupts, 
reduce exception except where we really mean it, and move away from vec 
and trap (I've got this wrong in the past too I admit). We don't have to 
do it all immediately, but new code should go in this direction.

Thanks,
Nick