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Message-ID: <CAE2upjQ596=iBff4s0nMkSD8jUyPpqC3bTRvVhysftJnHaOYbA@mail.gmail.com>
Date:   Wed, 7 Apr 2021 11:38:53 -0400
From:   Rajneesh Bhardwaj <irenic.rajneesh@...il.com>
To:     "David E. Box" <david.e.box@...ux.intel.com>
Cc:     hdegoede@...hat.com, mgross@...ux.intel.com,
        gayatri.kammela@...el.com, platform-driver-x86@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 5/9] platform/x86: intel_pmc_core: Get LPM requirements
 for Tiger Lake

On Wed, Mar 31, 2021 at 11:06 PM David E. Box
<david.e.box@...ux.intel.com> wrote:
>
> From: Gayatri Kammela <gayatri.kammela@...el.com>
>
> Platforms that support low power modes (LPM) such as Tiger Lake maintain
> requirements for each sub-state that a readable in the PMC. However, unlike
> LPM status registers, requirement registers are not memory mapped but are
> available from an ACPI _DSM. Collect the requirements for Tiger Lake using
> the _DSM method and store in a buffer.
>
> Signed-off-by: Gayatri Kammela <gayatri.kammela@...el.com>
> Co-developed-by: David E. Box <david.e.box@...ux.intel.com>
> Signed-off-by: David E. Box <david.e.box@...ux.intel.com>
> ---
>  drivers/platform/x86/intel_pmc_core.c | 49 +++++++++++++++++++++++++++
>  drivers/platform/x86/intel_pmc_core.h |  2 ++
>  2 files changed, 51 insertions(+)
>
> diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c
> index ba0db301f07b..0ec26a4c715e 100644
> --- a/drivers/platform/x86/intel_pmc_core.c
> +++ b/drivers/platform/x86/intel_pmc_core.c
> @@ -23,7 +23,9 @@
>  #include <linux/slab.h>
>  #include <linux/suspend.h>
>  #include <linux/uaccess.h>
> +#include <linux/uuid.h>
>
> +#include <acpi/acpi_bus.h>
>  #include <asm/cpu_device_id.h>
>  #include <asm/intel-family.h>
>  #include <asm/msr.h>
> @@ -31,6 +33,9 @@
>
>  #include "intel_pmc_core.h"
>
> +#define ACPI_S0IX_DSM_UUID             "57a6512e-3979-4e9d-9708-ff13b2508972"
> +#define ACPI_GET_LOW_MODE_REGISTERS    1
> +
>  /* PKGC MSRs are common across Intel Core SoCs */
>  static const struct pmc_bit_map msr_map[] = {
>         {"Package C2",                  MSR_PKG_C2_RESIDENCY},
> @@ -587,6 +592,46 @@ static const struct pmc_reg_map tgl_reg_map = {
>         .lpm_live_status_offset = TGL_LPM_LIVE_STATUS_OFFSET,
>  };
>
> +static void pmc_core_get_tgl_lpm_reqs(struct platform_device *pdev)
> +{
> +       struct pmc_dev *pmcdev = platform_get_drvdata(pdev);
> +       const int num_maps = pmcdev->map->lpm_num_maps;
> +       size_t lpm_size = LPM_MAX_NUM_MODES * num_maps * 4;
> +       union acpi_object *out_obj;
> +       struct acpi_device *adev;
> +       guid_t s0ix_dsm_guid;
> +       u32 *lpm_req_regs;
> +
> +       adev = ACPI_COMPANION(&pdev->dev);
> +       if (!adev)
> +               return;
> +
> +       lpm_req_regs = devm_kzalloc(&pdev->dev, lpm_size * sizeof(u32),
> +                                    GFP_KERNEL);
> +       if (!lpm_req_regs)
> +               return;
> +
> +       guid_parse(ACPI_S0IX_DSM_UUID, &s0ix_dsm_guid);
> +
> +       out_obj = acpi_evaluate_dsm(adev->handle, &s0ix_dsm_guid, 0,
> +                                   ACPI_GET_LOW_MODE_REGISTERS, NULL);
> +       if (out_obj && out_obj->type == ACPI_TYPE_BUFFER) {
> +               u32 *addr = (u32 *)out_obj->buffer.pointer;
> +               int size = out_obj->buffer.length;
> +
> +               if (size != lpm_size)
> +                       return;
> +
> +               memcpy_fromio(lpm_req_regs, addr, lpm_size);

this is not __iomem* so why are you using this? Simple memcpy should work here.

> +       } else
> +               acpi_handle_debug(adev->handle,
> +                                 "_DSM function 0 evaluation failed\n");
> +
> +       ACPI_FREE(out_obj);
> +
> +       pmcdev->lpm_req_regs = lpm_req_regs;
> +}
> +
>  static inline u32 pmc_core_reg_read(struct pmc_dev *pmcdev, int reg_offset)
>  {
>         return readl(pmcdev->regbase + reg_offset);
> @@ -1312,10 +1357,14 @@ static int pmc_core_probe(struct platform_device *pdev)
>                 return -ENOMEM;
>
>         mutex_init(&pmcdev->lock);
> +
>         pmcdev->pmc_xram_read_bit = pmc_core_check_read_lock_bit(pmcdev);
>         pmc_core_get_low_power_modes(pmcdev);
>         pmc_core_do_dmi_quirks(pmcdev);
>
> +       if (pmcdev->map == &tgl_reg_map)
> +               pmc_core_get_tgl_lpm_reqs(pdev);
> +
>         /*
>          * On TGL, due to a hardware limitation, the GBE LTR blocks PC10 when
>          * a cable is attached. Tell the PMC to ignore it.
> diff --git a/drivers/platform/x86/intel_pmc_core.h b/drivers/platform/x86/intel_pmc_core.h
> index 3800c1ba6fb7..81d797feed33 100644
> --- a/drivers/platform/x86/intel_pmc_core.h
> +++ b/drivers/platform/x86/intel_pmc_core.h
> @@ -288,6 +288,7 @@ struct pmc_reg_map {
>   * @s0ix_counter:      S0ix residency (step adjusted)
>   * @num_modes:         Count of enabled modes
>   * @lpm_en_modes:      Array of enabled modes from lowest to highest priority
> + * @lpm_req_regs:      List of substate requirements
>   *
>   * pmc_dev contains info about power management controller device.
>   */
> @@ -304,6 +305,7 @@ struct pmc_dev {
>         u64 s0ix_counter;
>         int num_modes;
>         int lpm_en_modes[LPM_MAX_NUM_MODES];
> +       u32 *lpm_req_regs;
>  };
>
>  #define pmc_for_each_mode(i, mode, pmcdev)             \
> --
> 2.25.1
>


-- 
Thanks,
Rajneesh

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