linux-kernel - Re: [PATCH V5 16/25] perf/x86: Register hybrid PMUs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <525491eb-1733-ffd8-9b92-6409b2b6e0a0@linux.intel.com>
Date:   Fri, 9 Apr 2021 11:47:06 -0400
From:   "Liang, Kan" <kan.liang@...ux.intel.com>
To:     Peter Zijlstra <peterz@...radead.org>
Cc:     mingo@...nel.org, linux-kernel@...r.kernel.org, acme@...nel.org,
        tglx@...utronix.de, bp@...en8.de, namhyung@...nel.org,
        jolsa@...hat.com, ak@...ux.intel.com, yao.jin@...ux.intel.com,
        alexander.shishkin@...ux.intel.com, adrian.hunter@...el.com,
        ricardo.neri-calderon@...ux.intel.com
Subject: Re: [PATCH V5 16/25] perf/x86: Register hybrid PMUs



On 4/9/2021 11:45 AM, Peter Zijlstra wrote:
> On Fri, Apr 09, 2021 at 09:50:20AM -0400, Liang, Kan wrote:
>>
>>
>> On 4/9/2021 2:58 AM, Peter Zijlstra wrote:
>>> On Mon, Apr 05, 2021 at 08:10:58AM -0700, kan.liang@...ux.intel.com wrote:
>>>> @@ -2089,9 +2119,46 @@ static int __init init_hw_perf_events(void)
>>>>    	if (err)
>>>>    		goto out1;
>>>> -	err = perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW);
>>>> -	if (err)
>>>> -		goto out2;
>>>> +	if (!is_hybrid()) {
>>>> +		err = perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW);
>>>> +		if (err)
>>>> +			goto out2;
>>>> +	} else {
>>>> +		u8 cpu_type = get_this_hybrid_cpu_type();
>>>> +		struct x86_hybrid_pmu *hybrid_pmu;
>>>> +		bool registered = false;
>>>> +		int i;
>>>> +
>>>> +		if (!cpu_type && x86_pmu.get_hybrid_cpu_type)
>>>> +			cpu_type = x86_pmu.get_hybrid_cpu_type();
>>>> +
>>>> +		for (i = 0; i < x86_pmu.num_hybrid_pmus; i++) {
>>>> +			hybrid_pmu = &x86_pmu.hybrid_pmu[i];
>>>> +
>>>> +			hybrid_pmu->pmu = pmu;
>>>> +			hybrid_pmu->pmu.type = -1;
>>>> +			hybrid_pmu->pmu.attr_update = x86_pmu.attr_update;
>>>> +			hybrid_pmu->pmu.capabilities |= PERF_PMU_CAP_HETEROGENEOUS_CPUS;
>>>> +
>>>> +			err = perf_pmu_register(&hybrid_pmu->pmu, hybrid_pmu->name,
>>>> +						(hybrid_pmu->cpu_type == hybrid_big) ? PERF_TYPE_RAW : -1);
>>>> +			if (err)
>>>> +				continue;
>>>> +
>>>> +			if (cpu_type == hybrid_pmu->cpu_type)
>>>> +				x86_pmu_update_cpu_context(&hybrid_pmu->pmu, raw_smp_processor_id());
>>>> +
>>>> +			registered = true;
>>>> +		}
>>>> +
>>>> +		if (!registered) {
>>>> +			pr_warn("Failed to register hybrid PMUs\n");
>>>> +			kfree(x86_pmu.hybrid_pmu);
>>>> +			x86_pmu.hybrid_pmu = NULL;
>>>> +			x86_pmu.num_hybrid_pmus = 0;
>>>> +			goto out2;
>>>> +		}
>>>
>>> I don't think this is quite right. registered will be true even if one
>>> fails, while I think you meant to only have it true when all (both)
>>> types registered correctly.
>>
>> No, I mean that perf error out only when all types fail to be registered.
> 
> All or nothing seems a better approach to me. There really isn't a good
> reason for any one of them to fail.
> 

Sure. I will change it in V6.

Thanks,
Kan