lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Fri, 9 Apr 2021 17:51:56 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     "Liang, Kan" <kan.liang@...ux.intel.com>
Cc:     mingo@...nel.org, linux-kernel@...r.kernel.org, acme@...nel.org,
        tglx@...utronix.de, bp@...en8.de, namhyung@...nel.org,
        jolsa@...hat.com, ak@...ux.intel.com, yao.jin@...ux.intel.com,
        alexander.shishkin@...ux.intel.com, adrian.hunter@...el.com,
        ricardo.neri-calderon@...ux.intel.com,
        Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH V5 21/25] perf: Introduce PERF_TYPE_HARDWARE_PMU and
 PERF_TYPE_HW_CACHE_PMU

On Fri, Apr 09, 2021 at 11:24:07AM -0400, Liang, Kan wrote:

> diff --git a/include/uapi/linux/perf_event.h
> b/include/uapi/linux/perf_event.h
> index ad15e40..7ec80ac9 100644
> --- a/include/uapi/linux/perf_event.h
> +++ b/include/uapi/linux/perf_event.h
> @@ -38,6 +38,20 @@ enum perf_type_id {
>  };
> 
>  /*
> + * attr.config layout for type PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE
> + * PERF_TYPE_HARDWARE:			0xEE000000AA
> + *					AA: hardware event ID
> + *					EE: PMU type ID
> + * PERF_TYPE_HW_CACHE:			0xEE00DDCCBB
> + *					BB: hardware cache ID
> + *					CC: hardware cache op ID
> + *					DD: hardware cache op result ID
> + *					EE: PMU type ID

it's: 0xEEEEEEEE00DDCCBB and 0xEEEEEEEE000000AA


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ