linux-kernel - RE: [PATCH] riscv: locks: introduce ticket-based spinlock implementation

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Date:   Tue, 13 Apr 2021 10:54:36 +0000
From:   David Laight <David.Laight@...LAB.COM>
To:     'Catalin Marinas' <catalin.marinas@....com>,
        Christoph Müllner <christophm30@...il.com>
CC:     Peter Zijlstra <peterz@...radead.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Anup Patel <anup@...infault.org>, Guo Ren <guoren@...nel.org>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        "Linux Kernel Mailing List" <linux-kernel@...r.kernel.org>,
        Guo Ren <guoren@...ux.alibaba.com>,
        "will.deacon@....com" <will.deacon@....com>,
        "Arnd Bergmann" <arnd@...db.de>
Subject: RE: [PATCH] riscv: locks: introduce ticket-based spinlock
 implementation

From: Catalin Marinas
> Sent: 13 April 2021 11:45
...
> This indeed needs some care. IIUC RISC-V has similar restrictions as arm
> here, no load/store instructions are allowed between LR and SC. You
> can't guarantee that the compiler won't spill some variable onto the
> stack.

You can probably never guarantee the compiler won't spill to stack.
Especially if someone compiles with -O0.

Which probably means that anything using LR/SC must be written in
asm and the C wrappers disabled.

	David

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