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Message-Id: <20210414073108.3899082-1-ikjn@chromium.org>
Date:   Wed, 14 Apr 2021 15:31:08 +0800
From:   Ikjoon Jang <ikjn@...omium.org>
To:     linux-mediatek@...ts.infradead.org
Cc:     Chun-Jie Chen <chun-jie.chen@...iatek.com>,
        Enric Balletbo i Serra <enric.balletbo@...labora.com>,
        Weiyi Lu <weiyi.lu@...iatek.com>,
        Ikjoon Jang <ikjn@...omium.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH v2] arm64: dts: mt8183: Add power-domains properity to mfgcfg

mfgcfg clock is under MFG_ASYNC power domain

Signed-off-by: Weiyi Lu <weiyi.lu@...iatek.com>
Signed-off-by: Ikjoon Jang <ikjn@...omium.org>
---

Changes in v2:
Fix a wrong power domain reference (scpsys to spm).

Link(v1): https://patchwork.kernel.org/project/linux-mediatek/patch/20210224091742.1060508-1-ikjn@chromium.org/#23997681

---
 arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 0ff7b67a6806..64813634c3df 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -1116,6 +1116,7 @@ mfgcfg: syscon@...00000 {
 			compatible = "mediatek,mt8183-mfgcfg", "syscon";
 			reg = <0 0x13000000 0 0x1000>;
 			#clock-cells = <1>;
+			power-domains = <&spm MT8183_POWER_DOMAIN_MFG_ASYNC>;
 		};
 
 		mmsys: syscon@...00000 {
-- 
2.31.1.295.g9ea45b61b8-goog

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