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Message-ID: <YHhR/YR6Ecp6yU4D@pendragon.ideasonboard.com>
Date: Thu, 15 Apr 2021 17:47:25 +0300
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Jacopo Mondi <jacopo+renesas@...ndi.org>
Cc: Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Kieran Bingham <kieran.bingham@...asonboard.com>,
Rob Herring <robh+dt@...nel.org>,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 4/7] arm64: dts: renesas: r8a77970: Add csi40 port@0
Hi Jacopo,
Thank you for the patch.
On Thu, Apr 15, 2021 at 02:25:59PM +0200, Jacopo Mondi wrote:
> Declare port@0 in the csi40 device node and leave it un-connected.
> Each board .dts file will connect the port as it requires.
>
> Signed-off-by: Jacopo Mondi <jacopo+renesas@...ndi.org>
The port exists at the hardware level, so including it here sounds good.
The DT binding even makes the port mandatory :-)
Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
> ---
> arch/arm64/boot/dts/renesas/r8a77970.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> index 5a5d5649332a..e8f6352c3665 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -1106,6 +1106,10 @@ ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> + port@0 {
> + reg = <0>;
> + };
> +
> port@1 {
> #address-cells = <1>;
> #size-cells = <0>;
--
Regards,
Laurent Pinchart
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