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Message-ID: <AM6PR04MB496668C16DBDC3D46A2A018080479@AM6PR04MB4966.eurprd04.prod.outlook.com>
Date: Wed, 21 Apr 2021 10:12:20 +0000
From: Aisheng Dong <aisheng.dong@....com>
To: "Mirela Rabulea (OSS)" <mirela.rabulea@....nxp.com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"G.n. Zhou" <guoniu.zhou@....com>,
"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>
CC: Peng Fan <peng.fan@....com>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
dl-linux-imx <linux-imx@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"mchehab@...nel.org" <mchehab@...nel.org>,
"hverkuil-cisco@...all.nl" <hverkuil-cisco@...all.nl>,
"linux-media@...r.kernel.org" <linux-media@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"paul.kocialkowski@...tlin.com" <paul.kocialkowski@...tlin.com>,
Daniel Baluta <daniel.baluta@....com>,
Robert Chiras <robert.chiras@....com>,
Laurentiu Palcu <laurentiu.palcu@....com>,
"p.zabel@...gutronix.de" <p.zabel@...gutronix.de>,
"ezequiel@...labora.com" <ezequiel@...labora.com>,
Mirela Rabulea <mirela.rabulea@....com>
Subject: RE: [PATCH v10] arm64: dts: imx8qxp: Add jpeg encoder/decoder nodes
+ linux-arm-kernel@...ts.infradead.org
> From: Mirela Rabulea (OSS) <mirela.rabulea@....nxp.com>
> Sent: Wednesday, April 7, 2021 1:28 AM
>
> Add dts for imaging subsytem, include jpeg nodes here.
> Tested on imx8qxp only, should work on imx8qm, but it was not tested.
>
> Signed-off-by: Mirela Rabulea <mirela.rabulea@....com>
> ---
> This was patch #7 in the initial patch set that added mxc-jpeg driver
>
> Changes in v10:
> Addressed feedback from Aisheng Dong:
> -Add jpeg clocks in the jpeg dts nodes.
> -Adapt to the recent split of the dts into subsystems:
> add the imaging subsystem, and place jpeg nodes there.
>
> .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 89 +++++++++++++++++++
> arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 1 +
> 2 files changed, 90 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> new file mode 100644
> index 000000000000..1457d219a658
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
> @@ -0,0 +1,89 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2019-2021 NXP
> + * Zhou Guoniu <guoniu.zhou@....com>
> + */
> +img_subsys: bus@...00000 {
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x58000000 0x0 0x58000000 0x1000000>;
> +
> + img_ipg_clk: clock-img-ipg {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <200000000>;
> + clock-output-names = "img_ipg_clk";
> + };
> +
> + img_jpeg_dec_clk: clock-controller@...d0000 {
s/clk/lpcg
> + compatible = "fsl,imx8qxp-lpcg";
> + reg = <0x585d0000 0x10000>;
> + #clock-cells = <1>;
> + clocks = <&img_ipg_clk>, <&img_ipg_clk>;
> + clock-indices = <IMX_LPCG_CLK_0>,
> + <IMX_LPCG_CLK_4>;
> + clock-output-names = "img_jpeg_dec_clk",
> + "img_jpeg_dec_ipg_clk";
> + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>;
> + };
> +
> + img_jpeg_enc_clk: clock-controller@...f0000 {
s/clk/lpcg
> + compatible = "fsl,imx8qxp-lpcg";
> + reg = <0x585f0000 0x10000>;
> + #clock-cells = <1>;
> + clocks = <&img_ipg_clk>, <&img_ipg_clk>;
> + clock-indices = <IMX_LPCG_CLK_0>,
> + <IMX_LPCG_CLK_4>;
> + clock-output-names = "img_jpeg_enc_clk",
> + "img_jpeg_enc_ipg_clk";
> + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>;
> + };
> +
> + cameradev: camera {
Is this node necessary?
> + compatible = "simple-bus";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + jpegdec: jpegdec@...00000 {
> + compatible = "nxp,imx8qxp-jpgdec";
Is this compatible string upstreamed already?
> + reg = <0x58400000 0x00050000 >;
> + interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&img_jpeg_dec_clk 0>,
> + <&img_jpeg_dec_clk 1>;
Is the index correct here?
> + clock-names = "per", "ipg";
> + assigned-clocks = <&img_jpeg_dec_clk 0>,
> + <&img_jpeg_dec_clk 1>;
> + assigned-clock-rates = <200000000>;
Mismatch with assigned-clocks
> + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
> + <&pd IMX_SC_R_MJPEG_DEC_S0>,
> + <&pd IMX_SC_R_MJPEG_DEC_S1>,
> + <&pd IMX_SC_R_MJPEG_DEC_S2>,
> + <&pd IMX_SC_R_MJPEG_DEC_S3>;
> + };
> +
> + jpegenc: jpegenc@...50000 {
> + compatible = "nxp,imx8qxp-jpgenc";
> + reg = <0x58450000 0x00050000 >;
> + interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&img_jpeg_enc_clk 0>,
> + <&img_jpeg_enc_clk 1>;
Ditto
> + clock-names = "per", "ipg";
> + assigned-clocks = <&img_jpeg_enc_clk 0>,
> + <&img_jpeg_enc_clk 1>;
> + assigned-clock-rates = <200000000>;
Ditto
> + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
> + <&pd IMX_SC_R_MJPEG_ENC_S0>,
> + <&pd IMX_SC_R_MJPEG_ENC_S1>,
> + <&pd IMX_SC_R_MJPEG_ENC_S2>,
> + <&pd IMX_SC_R_MJPEG_ENC_S3>;
> + };
> + };
> +};
Regards
Aisheng
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> index 1e6b4995091e..2d9589309bd0 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> @@ -258,6 +258,7 @@
> };
>
> /* sorted in register address */
> + #include "imx8-ss-img.dtsi"
> #include "imx8-ss-adma.dtsi"
> #include "imx8-ss-conn.dtsi"
> #include "imx8-ss-ddr.dtsi"
> --
> 2.17.1
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