[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <94f76086-3819-4bbb-4bc7-d917cbef01bc@gmail.com>
Date: Mon, 26 Apr 2021 11:23:55 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: Oleksij Rempel <o.rempel@...gutronix.de>,
Woojung Huh <woojung.huh@...rochip.com>,
UNGLinuxDriver@...rochip.com, Andrew Lunn <andrew@...n.ch>,
Vivien Didelot <vivien.didelot@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>
Cc: Michael Grzeschik <m.grzeschik@...gutronix.de>,
kernel@...gutronix.de, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org, Russell King <linux@...linux.org.uk>
Subject: Re: [PATCH net-next v7 7/9] net: phy: Add support for microchip SMI0
MDIO bus
On 4/26/21 6:19 AM, Oleksij Rempel wrote:
> From: Andrew Lunn <andrew@...n.ch>
>
> SMI0 is a mangled version of MDIO. The main low level difference is
> the MDIO C22 OP code is always 0, not 0x2 or 0x1 for Read/Write. The
> read/write information is instead encoded in the PHY address.
>
> Extend the bit-bang code to allow the op code to be overridden, but
> default to normal C22 values. Add an extra compatible to the mdio-gpio
> driver, and when this compatible is present, set the op codes to 0.
>
> A higher level driver, sitting on top of the basic MDIO bus driver can
> then implement the rest of the microchip SMI0 odderties.
>
> Signed-off-by: Andrew Lunn <andrew@...n.ch>
> Signed-off-by: Michael Grzeschik <m.grzeschik@...gutronix.de>
> Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
--
Florian
Powered by blists - more mailing lists