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Message-ID: <20210426012456.GB27585@dragon>
Date: Mon, 26 Apr 2021 09:24:57 +0800
From: Shawn Guo <shawnguo@...nel.org>
To: Richard Zhu <hongxing.zhu@....com>
Cc: l.stach@...gutronix.de, linux-imx@....com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: imx8mq-evk: add one regulator used to power
up pcie phy
On Mon, Mar 29, 2021 at 04:06:03PM +0800, Richard Zhu wrote:
> Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY.
> In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
> sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
> the VREG_BYPASS bits of GPR registers should be cleared from default
> value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be
> turned on.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> Reviewed-by: Lucas Stach <l.stach@...gutronix.de>
> ---
> arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> index 85b045253a0e..4d2035e3dd7c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> @@ -318,6 +318,7 @@
> <&clk IMX8MQ_CLK_PCIE1_PHY>,
> <&pcie0_refclk>;
> clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
> + vph-supply = <&vgen5_reg>;
Hmm, I do not see this in the bindings doc.
Shawn
> status = "okay";
> };
>
> --
> 2.17.1
>
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